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authorUwe Hermann <uwe@hermann-uwe.de>2007-12-17 21:34:53 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2007-12-17 21:34:53 +0000
commit8ef47da471fe22b7d3ae33145efa85b40c89bbc9 (patch)
tree15770b8d6da66d3c16cf98af9de3a4799980b928 /src/mainboard/gigabyte/ga-6bxc
parent12a3f1edecbbc211327202782fbda027faea38b8 (diff)
downloadcoreboot-8ef47da471fe22b7d3ae33145efa85b40c89bbc9.tar.xz
Enable IDE legacy port access for all 440BX based boards per default, as
this is needed (at the very least) to make FILO work on these boards. Disable UDMA/33 per default, which is slower but the safe choice, as we don't know which IDE devices a user has attached, and some don't support UDMA/33 very well or at all. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3010 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/gigabyte/ga-6bxc')
-rw-r--r--src/mainboard/gigabyte/ga-6bxc/Config.lb6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/gigabyte/ga-6bxc/Config.lb b/src/mainboard/gigabyte/ga-6bxc/Config.lb
index d6bfb2f5b5..e9c904305d 100644
--- a/src/mainboard/gigabyte/ga-6bxc/Config.lb
+++ b/src/mainboard/gigabyte/ga-6bxc/Config.lb
@@ -128,6 +128,12 @@ chip northbridge/intel/i440bx # Northbridge
device pci 7.3 on end # ACPI
register "ide0_enable" = "1"
register "ide1_enable" = "1"
+ register "ide_legacy_enable" = "1"
+ # Enable UDMA/33 for higher speed if your IDE device(s) support it.
+ register "ide0_drive0_udma33_enable" = "0"
+ register "ide0_drive1_udma33_enable" = "0"
+ register "ide1_drive0_udma33_enable" = "0"
+ register "ide1_drive1_udma33_enable" = "0"
end
end
end