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| author | Anders Jenbo <anders@jenbo.dk> | 2010-05-14 19:50:11 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2010-05-14 19:50:11 +0000 |
| commit | 9d1c76f54c105a15f227183460ebe8d88cb719a7 (patch) | |
| tree | 576f40663e264e2e0cd3e4f4b0219328f885dca2 /src/mainboard/gigabyte/ga-6bxe/devicetree.cb | |
| parent | 2f4b7f6cb1be61f4c36a85cbf3cb12822375a4f0 (diff) | |
| download | coreboot-9d1c76f54c105a15f227183460ebe8d88cb719a7.tar.xz | |
Add initial support for the GIGABYTE GA-6BXE.
Signed-off-by: Anders Jenbo <anders@jenbo.dk>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5554 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/gigabyte/ga-6bxe/devicetree.cb')
| -rw-r--r-- | src/mainboard/gigabyte/ga-6bxe/devicetree.cb | 57 |
1 files changed, 57 insertions, 0 deletions
diff --git a/src/mainboard/gigabyte/ga-6bxe/devicetree.cb b/src/mainboard/gigabyte/ga-6bxe/devicetree.cb new file mode 100644 index 0000000000..f84c7b38d8 --- /dev/null +++ b/src/mainboard/gigabyte/ga-6bxe/devicetree.cb @@ -0,0 +1,57 @@ +chip northbridge/intel/i440bx # Northbridge + device lapic_cluster 0 on # APIC cluster + chip cpu/intel/slot_1 # CPU + device lapic 0 on end # APIC + end + end + device pci_domain 0 on # PCI domain + device pci 0.0 on end # Host bridge + device pci 1.0 on end # PCI/AGP bridge + chip southbridge/intel/i82371eb # Southbridge + device pci 7.0 on # ISA bridge + chip superio/ite/it8671f # Super I/O + device pnp 3f0.0 on # Floppy + io 0x60 = 0x3f0 + irq 0x70 = 6 + drq 0x74 = 2 + end + device pnp 3f0.1 on # COM1 + io 0x60 = 0x3f8 + irq 0x70 = 4 + end + device pnp 3f0.2 on # COM2 / IR + io 0x60 = 0x2f8 + irq 0x70 = 3 + end + device pnp 3f0.3 on # Parallel port + io 0x60 = 0x378 + irq 0x70 = 7 + end + device pnp 3f0.4 on # APC + end + device pnp 3f0.5 on # PS/2 keyboard + io 0x60 = 0x60 + io 0x62 = 0x64 + irq 0x70 = 1 + end + device pnp 3f0.6 on # PS/2 mouse + irq 0x70 = 12 + end + device pnp 3f0.7 on # GPIO + end + end + end + device pci 7.1 on end # IDE + device pci 7.2 on end # USB + device pci 7.3 on end # ACPI + register "ide0_enable" = "1" + register "ide1_enable" = "1" + register "ide_legacy_enable" = "1" + # Enable UDMA/33 for higher speed if your IDE device(s) support it. + register "ide0_drive0_udma33_enable" = "1" + register "ide0_drive1_udma33_enable" = "1" + register "ide1_drive0_udma33_enable" = "1" + register "ide1_drive1_udma33_enable" = "1" + end + end +end |