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authorArthur Heymans <arthur@aheymans.xyz>2016-10-15 18:00:22 +0200
committerMartin Roth <martinroth@google.com>2016-11-08 23:38:58 +0100
commitbe913983534a340cce81ad9da084abec9ff6311b (patch)
treed9ef89b4e387f01866095c96934ff120e60aab65 /src/mainboard/gigabyte/ga-945gcm-s2l/acpi/ich7_pci_irqs.asl
parent4c5b31e567852ef45660e549a394ce17b8d5572c (diff)
downloadcoreboot-be913983534a340cce81ad9da084abec9ff6311b.tar.xz
mb/gigabyte/ga-945gcm-s2l: add mainboard
Startpoint was Intel d945gclf, which has same chipset and Gigabyte ga-g41m-es2l which has same Superio. What works and is tested: * PCI slot; * PCIe x16 slot with GPU (RADEON HD 2600 XT) and ADD2 DVI card; * onboard VGA output (only textmode implemented) with native graphic init; * 533, 800, 1067MHz FSB CPU (1333MHz is unsupported by the chipset); * serial output during and after boot. What does not work: * resume from suspend (does not work for d945gclf either). Quirks: * The Realtek ethernet card requires a reset which currently also hardcodes a MAC adress. This board was only tested with the SeaBIOS payload due to flash size constraints (512KB) and with GNU/Linux. Change-Id: I0ff9f193105facc1b276a791790e27eb4c275085 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/17033 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/gigabyte/ga-945gcm-s2l/acpi/ich7_pci_irqs.asl')
-rw-r--r--src/mainboard/gigabyte/ga-945gcm-s2l/acpi/ich7_pci_irqs.asl44
1 files changed, 44 insertions, 0 deletions
diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/ich7_pci_irqs.asl b/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/ich7_pci_irqs.asl
new file mode 100644
index 0000000000..cc229a59bb
--- /dev/null
+++ b/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/ich7_pci_irqs.asl
@@ -0,0 +1,44 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007-2009 coresystems GmbH
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/* This is board specific information: IRQ routing for the
+ * 0:1e.0 PCI bridge of the ICH7
+ */
+
+
+If (PICM) {
+ Return (Package() {
+ Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x14 },
+ Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x13 },
+ Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x12 },
+ Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x10 },
+ Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x13 },
+ Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x12 },
+ Package (0x04) { 0x0001FFFF, 0x02, 0x00, 0x10 },
+ Package (0x04) { 0x0001FFFF, 0x03, 0x00, 0x14 },
+
+ })
+} Else {
+ Return (Package() {
+ Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LPCB.LNKE, 0x00 },
+ Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LPCB.LNKD, 0x00 },
+ Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LPCB.LNKC, 0x00 },
+ Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LPCB.LNKA, 0x00 },
+ Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI0.LPCB.LNKD, 0x00 },
+ Package (0x04) { 0x0001FFFF, 0x01, \_SB.PCI0.LPCB.LNKC, 0x00 },
+ Package (0x04) { 0x0001FFFF, 0x02, \_SB.PCI0.LPCB.LNKA, 0x00 },
+ Package (0x04) { 0x0001FFFF, 0x03, \_SB.PCI0.LPCB.LNKE, 0x00 },
+ })
+}