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authorPatrick Rudolph <siro@das-labor.org>2017-05-04 19:00:33 +0200
committerPatrick Rudolph <siro@das-labor.org>2017-05-21 16:38:34 +0200
commitac27d3688a862074631e3a1390caf85c068d55cb (patch)
tree904158a0566038c8d2c51972e2318370ef5617b2 /src/mainboard/gigabyte/ga-b75m-d3h
parent7565cf1a49bf9688e636e1ebc6a4cb8e1e567e1b (diff)
downloadcoreboot-ac27d3688a862074631e3a1390caf85c068d55cb.tar.xz
mb/*/romstage: Don't lock ETR3 CF9GR in early romstage
Do not lock ETR3 CF9GR in early romstage. As of Change-Id: I2cb30267a6342db1f3b11715034219ffb18ca678 this is done in bd82x6x's finalize handler. Change-Id: Iea091511f0d2a6128d3a19e9413090c85e4c2e57 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/19570 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/mainboard/gigabyte/ga-b75m-d3h')
-rw-r--r--src/mainboard/gigabyte/ga-b75m-d3h/romstage.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/romstage.c b/src/mainboard/gigabyte/ga-b75m-d3h/romstage.c
index bb3b223c3b..cbc55921a8 100644
--- a/src/mainboard/gigabyte/ga-b75m-d3h/romstage.c
+++ b/src/mainboard/gigabyte/ga-b75m-d3h/romstage.c
@@ -153,7 +153,7 @@ void pch_enable_lpc(void)
pci_write_config32(PCH_LPC_DEV, LPC_GEN1_DEC, 0x3c0a01);
pci_write_config16(PCH_LPC_DEV, LPC_IO_DEC, 0x10);
- pci_write_config32(PCH_LPC_DEV, 0xac, 0x10000);
+ pci_write_config32(PCH_LPC_DEV, ETR3, 0x10000);
/* Initialize SuperIO */
ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);