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| author | Arthur Heymans <arthur@aheymans.xyz> | 2018-01-16 14:19:37 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-02-27 09:46:29 +0000 |
| commit | d2d2aef6a3222af909183fb96dc7bc908fac3cd4 (patch) | |
| tree | ff01f96984d46138bf3ab0bb253f04024d9fb0e1 /src/mainboard/gigabyte/ga-b75m-d3v | |
| parent | 5fd1d5ad1258407ade7fe8f72672c878bdfd8f05 (diff) | |
| download | coreboot-d2d2aef6a3222af909183fb96dc7bc908fac3cd4.tar.xz | |
sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location
Many generations of Intel hardware have identical code concerning the
RCBA.
Change-Id: I33ec6801b115c0d64de1d2a0dc5d439186f3580a
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/23287
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/mainboard/gigabyte/ga-b75m-d3v')
| -rw-r--r-- | src/mainboard/gigabyte/ga-b75m-d3v/mainboard.c | 1 | ||||
| -rw-r--r-- | src/mainboard/gigabyte/ga-b75m-d3v/romstage.c | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/gigabyte/ga-b75m-d3v/mainboard.c b/src/mainboard/gigabyte/ga-b75m-d3v/mainboard.c index d1fcfbca8b..590e25f110 100644 --- a/src/mainboard/gigabyte/ga-b75m-d3v/mainboard.c +++ b/src/mainboard/gigabyte/ga-b75m-d3v/mainboard.c @@ -27,6 +27,7 @@ #include <arch/io.h> #include <arch/interrupt.h> #include <boot/coreboot_tables.h> +#include <southbridge/intel/common/rcba.h> #include <southbridge/intel/bd82x6x/pch.h> #include <smbios.h> #include <device/pci.h> diff --git a/src/mainboard/gigabyte/ga-b75m-d3v/romstage.c b/src/mainboard/gigabyte/ga-b75m-d3v/romstage.c index a389e68f0d..283ad46dca 100644 --- a/src/mainboard/gigabyte/ga-b75m-d3v/romstage.c +++ b/src/mainboard/gigabyte/ga-b75m-d3v/romstage.c @@ -28,6 +28,7 @@ #include <superio/ite/common/ite.h> #include <northbridge/intel/sandybridge/sandybridge.h> #include <northbridge/intel/sandybridge/raminit_native.h> +#include <southbridge/intel/common/rcba.h> #include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/common/gpio.h> #include <arch/cpu.h> |