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authorPatrick Rudolph <siro@das-labor.org>2016-02-06 17:42:42 +0100
committerStefan Reinauer <stefan.reinauer@coreboot.org>2016-02-18 01:35:57 +0100
commite8e66f47631c505ab153d8a348058350b9acfe88 (patch)
tree535bc168855923222affbf6bdb06620cbd8fb343 /src/mainboard/gigabyte/ga-b75m-d3v
parentffc31d07f7839fa72073aae4ddbbd025ac4a7bac (diff)
downloadcoreboot-e8e66f47631c505ab153d8a348058350b9acfe88.tar.xz
southbridge/intel/bd82x6x: Use common gpio.c
Use shared gpio code from common folder. Bd82x6x's gpio.c and gpio.h is used by other southbridges as well and will be removed once it is unused. Change-Id: I8bd981c4696c174152cf41caefa6c083650d283a Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/13614 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/gigabyte/ga-b75m-d3v')
-rw-r--r--src/mainboard/gigabyte/ga-b75m-d3v/gpio.c2
-rw-r--r--src/mainboard/gigabyte/ga-b75m-d3v/romstage.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/gigabyte/ga-b75m-d3v/gpio.c b/src/mainboard/gigabyte/ga-b75m-d3v/gpio.c
index 1f2c5e7069..e7d48e8962 100644
--- a/src/mainboard/gigabyte/ga-b75m-d3v/gpio.c
+++ b/src/mainboard/gigabyte/ga-b75m-d3v/gpio.c
@@ -1,4 +1,4 @@
-#include "southbridge/intel/bd82x6x/gpio.h"
+#include <southbridge/intel/common/gpio.h>
static const struct pch_gpio_set1 pch_gpio_set1_mode = {
.gpio0 = GPIO_MODE_NATIVE,
.gpio1 = GPIO_MODE_NATIVE,
diff --git a/src/mainboard/gigabyte/ga-b75m-d3v/romstage.c b/src/mainboard/gigabyte/ga-b75m-d3v/romstage.c
index afb3f9f5ff..55a2a96783 100644
--- a/src/mainboard/gigabyte/ga-b75m-d3v/romstage.c
+++ b/src/mainboard/gigabyte/ga-b75m-d3v/romstage.c
@@ -29,7 +29,7 @@
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
-#include <southbridge/intel/bd82x6x/gpio.h>
+#include <southbridge/intel/common/gpio.h>
#include <arch/cpu.h>
#include <cpu/x86/msr.h>