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authorDamien Zammit <damien@zamaudio.com>2015-08-19 15:23:32 +1000
committerMartin Roth <martinroth@google.com>2015-12-30 22:21:01 +0100
commitcbe7a8e1008009c45551b56171da5df79a07fcce (patch)
tree759624ca71e905c443e4078e8b84c98711d7d93a /src/mainboard/gigabyte/ga-g41m-es2l/cstates.c
parent4b513a618d7d7edeb5ed9c5073e838b46e2f4676 (diff)
downloadcoreboot-cbe7a8e1008009c45551b56171da5df79a07fcce.tar.xz
gigabyte/ga-g41m-es2l: Add mainboard
Board uses x4x native raminit Board boots into Debian 8 with full graphics IRQ9: nobody cared, gets disabled (PIC needs IRQ settings?) VGA: - VGA native init works in grub with analog connector - Fails to boot with both channels of ram populated Change-Id: I7417813456817529b8cbaace45cefe47467d0a82 Signed-off-by: Damien Zammit <damien@zamaudio.com> Reviewed-on: https://review.coreboot.org/11306 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/gigabyte/ga-g41m-es2l/cstates.c')
-rw-r--r--src/mainboard/gigabyte/ga-g41m-es2l/cstates.c37
1 files changed, 37 insertions, 0 deletions
diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/cstates.c b/src/mainboard/gigabyte/ga-g41m-es2l/cstates.c
new file mode 100644
index 0000000000..dbac2ed020
--- /dev/null
+++ b/src/mainboard/gigabyte/ga-g41m-es2l/cstates.c
@@ -0,0 +1,37 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2012 secunet Security Networks AG
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/acpigen.h>
+#include <device/device.h>
+#include <southbridge/intel/i82801gx/i82801gx.h>
+
+static acpi_cstate_t cst_entries[] = {
+ {
+ /* acpi C1 / cpu C1 */
+ 1, 0x01, 1000,
+ { ACPI_ADDRESS_SPACE_FIXED, 1, 2, { 1 }, 0, 0 }
+ },
+ {
+ /* acpi C2 / cpu C2 */
+ 2, 0x01, 500,
+ { ACPI_ADDRESS_SPACE_FIXED, 1, 2, { 1 }, 0x10, 0 }
+ },
+};
+
+int get_cst_entries(acpi_cstate_t **entries)
+{
+ *entries = cst_entries;
+ return ARRAY_SIZE(cst_entries);
+}