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| author | Arthur Heymans <arthur@aheymans.xyz> | 2017-05-18 13:23:39 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2017-05-21 01:49:35 +0200 |
| commit | 3db82be764bea9796a46bed436765f1194a29a27 (patch) | |
| tree | e41c5a262a83a666587178becac7b93f81e6ea9f /src/mainboard/gigabyte/ga-g41m-es2l | |
| parent | abc504f427b9e2e7b0426b9eb44bcd7fa2726efb (diff) | |
| download | coreboot-3db82be764bea9796a46bed436765f1194a29a27.tar.xz | |
mb/gigabyte/ga-g41m-es2l: Enable IO decode range for LPT and FDD
Change-Id: I77aabf98ea48c6e8bdbe322f89666935f59a289a
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/19760
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard/gigabyte/ga-g41m-es2l')
| -rw-r--r-- | src/mainboard/gigabyte/ga-g41m-es2l/romstage.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c b/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c index b16f736be2..67d3eb1310 100644 --- a/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c +++ b/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c @@ -123,7 +123,8 @@ static void ich7_enable_lpc(void) /* Decode range */ pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x80, 0x0010); pci_write_config16(PCI_DEV(0, 0x1f, 0), LPC_EN, - CNF1_LPC_EN | CNF2_LPC_EN | KBC_LPC_EN | COMA_LPC_EN | COMB_LPC_EN); + CNF1_LPC_EN | CNF2_LPC_EN | KBC_LPC_EN | FDD_LPC_EN + | LPT_LPC_EN | COMA_LPC_EN | COMB_LPC_EN); pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x88, 0x0291); pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x8a, 0x007c); |