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author | Arthur Heymans <arthur@aheymans.xyz> | 2020-05-29 16:08:28 +0200 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2020-06-03 12:23:36 +0000 |
commit | efbf638b9a500b1d31130299a1cce3a5b4d9e398 (patch) | |
tree | fcf4b7ac2527e230e0f9f413dca2fdc13179f217 /src/mainboard/gigabyte/ga-g41m-es2l | |
parent | 58d3fce1819698de233c0d21313e1468b922e87c (diff) | |
download | coreboot-efbf638b9a500b1d31130299a1cce3a5b4d9e398.tar.xz |
mb/gigabyte/ga-g41m-es2l: Add PEG to devicetree
Change-Id: Icebf0eea4e1fee6d15ba3f1a080cbc40b42fd733
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41865
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/gigabyte/ga-g41m-es2l')
-rw-r--r-- | src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb b/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb index dade0b4063..2b23ca1006 100644 --- a/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb +++ b/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb @@ -14,6 +14,7 @@ chip northbridge/intel/x4x # Northbridge device pci 0.0 on # Host Bridge subsystemid 0x1458 0x5000 end + device pci 1.0 on end # PEG device pci 2.0 on # Integrated graphics controller subsystemid 0x1458 0xd000 end |