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| author | Stefan Reinauer <stepan@coresystems.de> | 2010-01-30 09:47:18 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-01-30 09:47:18 +0000 |
| commit | e37785791ae2be959cfe07962944745c81ca88f5 (patch) | |
| tree | 19371da337314f63e561feeac4cb923c49c64b72 /src/mainboard/gigabyte/m57sli | |
| parent | 89e45773a977da2c996221b74aef06596d345211 (diff) | |
| download | coreboot-e37785791ae2be959cfe07962944745c81ca88f5.tar.xz | |
* fix crt0s/ldscripts paths to fix out of tree build.
* fix iasl output directory for i945 boards (patch
for moving it to the mainboard directory will follow)
* coreboot_table.c: lb_mainboard can be static
* coreboot_table.c: dump memory table in debug and spew mode
* fix a warning in bootblock.c
* don't include arch/i386/init in arch/i386/Makefile.inc
* announce generation of crt0_includes.h
* allow overriding $(obj)
* drop unused src_types from Makefile
* correctly use hostname -s instead of hostname for COMPILE_HOST
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5065 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/gigabyte/m57sli')
| -rw-r--r-- | src/mainboard/gigabyte/m57sli/Makefile.inc | 30 |
1 files changed, 16 insertions, 14 deletions
diff --git a/src/mainboard/gigabyte/m57sli/Makefile.inc b/src/mainboard/gigabyte/m57sli/Makefile.inc index 44fedbb1b9..7bb3f2c629 100644 --- a/src/mainboard/gigabyte/m57sli/Makefile.inc +++ b/src/mainboard/gigabyte/m57sli/Makefile.inc @@ -33,21 +33,23 @@ obj-$(CONFIG_SUPERIO_ITE_IT8716F_OVERRIDE_FANCTL) += fanctl.o # This is part of the conversion to init-obj and away from included code. initobj-y += crt0.o -crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc -crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc -crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc -crt0-y += ../../../../src/arch/i386/lib/id.inc -crt0-y += ../../../../src/southbridge/nvidia/mcp55/romstrap.inc -crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc -crt0-y += auto.inc +crt0s := $(src)/cpu/x86/16bit/entry16.inc +crt0s += $(src)/cpu/x86/32bit/entry32.inc +crt0s += $(src)/cpu/x86/16bit/reset16.inc +crt0s += $(src)/arch/i386/lib/id.inc +crt0s += $(src)/southbridge/nvidia/mcp55/romstrap.inc +crt0s += $(src)/cpu/amd/car/cache_as_ram.inc +crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc -ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb -ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds -ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds -ldscript-y += ../../../../src/arch/i386/lib/id.lds -ldscript-y += ../../../../src/southbridge/nvidia/mcp55/romstrap.lds -ldscript-y += ../../../../src/arch/i386/lib/failover.lds -ldscript-$(CONFIG_AP_CODE_IN_CAR) += ../../../../src/arch/i386/init/ldscript_apc.lb +ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb +ldscripts += $(src)/cpu/x86/16bit/entry16.lds +ldscripts += $(src)/cpu/x86/16bit/reset16.lds +ldscripts += $(src)/arch/i386/lib/id.lds +ldscripts += $(src)/southbridge/nvidia/mcp55/romstrap.lds +ldscripts += $(src)/arch/i386/lib/failover.lds +ifeq($(CONFIG_AP_CODE_IN_CAR),y) +ldscripts += $(src)/arch/i386/init/ldscript_apc.lb +endif ifdef POST_EVALUATION |