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author | Patrick Georgi <patrick@georgi-clan.de> | 2010-11-21 14:41:07 +0000 |
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committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2010-11-21 14:41:07 +0000 |
commit | 5244e1ba63e5f3ea12066734bfb0d864a8f1f11d (patch) | |
tree | e389268c9bb473c457df4e7ab1de60922e0c7adf /src/mainboard/gigabyte/m57sli | |
parent | 8cda9699d4a2fea8ed2c5e4a7e66e8e1e0f831df (diff) | |
download | coreboot-5244e1ba63e5f3ea12066734bfb0d864a8f1f11d.tar.xz |
Convert more boards to use mptable_write_buses.
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6106 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/gigabyte/m57sli')
-rw-r--r-- | src/mainboard/gigabyte/m57sli/get_bus_conf.c | 22 | ||||
-rw-r--r-- | src/mainboard/gigabyte/m57sli/irq_tables.c | 1 | ||||
-rw-r--r-- | src/mainboard/gigabyte/m57sli/mptable.c | 15 |
3 files changed, 4 insertions, 34 deletions
diff --git a/src/mainboard/gigabyte/m57sli/get_bus_conf.c b/src/mainboard/gigabyte/m57sli/get_bus_conf.c index cad922f16a..0df65c7d6b 100644 --- a/src/mainboard/gigabyte/m57sli/get_bus_conf.c +++ b/src/mainboard/gigabyte/m57sli/get_bus_conf.c @@ -34,7 +34,6 @@ // Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables //busnum is default - unsigned char bus_isa; unsigned char bus_mcp55[8]; //1 unsigned apicid_mcp55; @@ -62,9 +61,6 @@ unsigned hcdnx[] = // 0x20202020, // 0x20202020, }; -unsigned bus_type[256]; - - static unsigned get_bus_conf_done = 0; @@ -75,7 +71,7 @@ void get_bus_conf(void) unsigned sbdn; device_t dev; - int i, j; + int i; if(get_bus_conf_done==1) return; //do it only once @@ -96,23 +92,14 @@ void get_bus_conf(void) bus_mcp55[i] = 0; } - for(i=0;i<256; i++) { - bus_type[i] = 0; - } - - bus_type[0] = 1; //pci - bus_mcp55[0] = (sysconf.pci1234[0] >> 16) & 0xff; - bus_type[bus_mcp55[0]] = 1; - /* MCP55 */ dev = dev_find_slot(bus_mcp55[0], PCI_DEVFN(sbdn + 0x06,0)); if (dev) { bus_mcp55[1] = pci_read_config8(dev, PCI_SECONDARY_BUS); bus_mcp55[2] = pci_read_config8(dev, PCI_SUBORDINATE_BUS); bus_mcp55[2]++; - for(j=bus_mcp55[1];j<bus_mcp55[2]; j++) bus_type[j] = 1; } else { printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sbdn + 0x06); @@ -125,14 +112,7 @@ void get_bus_conf(void) dev = dev_find_slot(bus_mcp55[0], PCI_DEVFN(sbdn + 0x0a + i - 2 , 0)); if (dev) { bus_mcp55[i] = pci_read_config8(dev, PCI_SECONDARY_BUS); - bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS); - bus_isa++; - for(j=bus_mcp55[i];j<bus_isa; j++) bus_type[j] = 1; } - else { - printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", bus_mcp55[0], sbdn + 0x0a + i - 2 ); - bus_isa = bus_mcp55[i-1]+1; - } } diff --git a/src/mainboard/gigabyte/m57sli/irq_tables.c b/src/mainboard/gigabyte/m57sli/irq_tables.c index bc6aded97f..ad9ce77912 100644 --- a/src/mainboard/gigabyte/m57sli/irq_tables.c +++ b/src/mainboard/gigabyte/m57sli/irq_tables.c @@ -50,7 +50,6 @@ static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t dev pirq_info->slot = slot; pirq_info->rfu = rfu; } -extern unsigned char bus_isa; extern unsigned char bus_mcp55[8]; //1 diff --git a/src/mainboard/gigabyte/m57sli/mptable.c b/src/mainboard/gigabyte/m57sli/mptable.c index 61e0e2821f..135174d8d4 100644 --- a/src/mainboard/gigabyte/m57sli/mptable.c +++ b/src/mainboard/gigabyte/m57sli/mptable.c @@ -27,18 +27,15 @@ #include <stdint.h> #include <cpu/amd/amdk8_sysconf.h> -extern unsigned char bus_isa; extern unsigned char bus_mcp55[8]; //1 extern unsigned apicid_mcp55; -extern unsigned bus_type[256]; - static void *smp_write_config_table(void *v) { struct mp_config_table *mc; unsigned sbdn; - int i,j,k; + int i, j, k, bus_isa; mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); @@ -49,13 +46,7 @@ static void *smp_write_config_table(void *v) get_bus_conf(); sbdn = sysconf.sbdn; -/*Bus: Bus ID Type*/ - /* define bus and isa numbers */ - for(j= 0; j < 256 ; j++) { - if(bus_type[j]) - smp_write_bus(mc, j, "PCI "); - } - smp_write_bus(mc, bus_isa, "ISA "); + mptable_write_buses(mc, NULL, &bus_isa); /*I/O APICs: APIC ID Version State Address*/ { @@ -106,7 +97,7 @@ static void *smp_write_config_table(void *v) } /* On bus 1: the PCI bus slots... - pyhsical PCI slots are j = 7,8 + physical PCI slots are j = 7,8 FireWire is j = 10 */ k=2; |