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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2018-05-22 02:18:00 +0300 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2019-01-06 01:17:54 +0000 |
commit | c70eed1e6202c928803f3e7f79161cd247a62b23 (patch) | |
tree | e46a6c87f6f13b7719fd40a9360d8d03359bfffb /src/mainboard/gigabyte/ma785gmt/mainboard.c | |
parent | 54efaae701dacd58621e66a8cf56812eb5304946 (diff) | |
download | coreboot-c70eed1e6202c928803f3e7f79161cd247a62b23.tar.xz |
device: Use pcidev_on_root()
Change-Id: Icf34b39d80f6e46d32a39b68f38fb2752c0bcebc
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/26484
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Piotr Król <piotr.krol@3mdeb.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/mainboard/gigabyte/ma785gmt/mainboard.c')
-rw-r--r-- | src/mainboard/gigabyte/ma785gmt/mainboard.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/gigabyte/ma785gmt/mainboard.c b/src/mainboard/gigabyte/ma785gmt/mainboard.c index 5949741b45..3b4edeece0 100644 --- a/src/mainboard/gigabyte/ma785gmt/mainboard.c +++ b/src/mainboard/gigabyte/ma785gmt/mainboard.c @@ -50,7 +50,7 @@ void set_pcie_dereset(void) pm_iowrite(0x94, byte); /* set the GPIO65 output enable and the value is 1 */ - sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0)); + sm_dev = pcidev_on_root(0x14, 0); word = pci_read_config16(sm_dev, 0x7e); word |= (1 << 0); word &= ~(1 << 4); @@ -76,7 +76,7 @@ void set_pcie_reset(void) pm_iowrite(0x94, byte); /* set the GPIO65 output enable and the value is 0 */ - sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0)); + sm_dev = pcidev_on_root(0x14, 0); word = pci_read_config16(sm_dev, 0x7e); word &= ~(1 << 0); word &= ~(1 << 4); @@ -92,7 +92,7 @@ int is_dev3_present(void) struct device *sm_dev; /* access the smbus extended register */ - sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0)); + sm_dev = pcidev_on_root(0x14, 0); /* put the GPIO68 output to tristate */ word = pci_read_config16(sm_dev, 0x7e); @@ -130,7 +130,7 @@ static void set_gpio40_gfx(void) pm2_iowrite(0xf1, byte); /* access the smbus extended register */ - sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0)); + sm_dev = pcidev_on_root(0x14, 0); /*if the dev3 is present, set the gfx to 2x8 lanes*/ /*otherwise set the gfx to 1x16 lanes*/ @@ -190,7 +190,7 @@ static void set_thermal_config(void) pm2_iowrite(0x42, byte); /* set GPIO 64 to input */ - sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0)); + sm_dev = pcidev_on_root(0x14, 0); word = pci_read_config16(sm_dev, 0x56); word |= 1 << 7; pci_write_config16(sm_dev, 0x56, word); |