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authorArthur Heymans <arthur@aheymans.xyz>2016-12-26 23:15:24 +0100
committerMartin Roth <martinroth@google.com>2017-01-03 17:35:06 +0100
commitc258bc1ac6de973246121a6f58e76d03c4b0a208 (patch)
tree9a3301ef54e03f0f0cf0ca7f3b5f07d1dfbc05f4 /src/mainboard/gigabyte
parent072a69e82e0c1322245eadde10f626d332f84f86 (diff)
downloadcoreboot-c258bc1ac6de973246121a6f58e76d03c4b0a208.tar.xz
mb/ga-m57sli: Add cmos.default
If the cmos checksum is incorrect it should fall back to sane defaults. Change-Id: If16cfc73effd4a825d0cefcd30bfd0e48b2d9132 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/17968 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard/gigabyte')
-rw-r--r--src/mainboard/gigabyte/m57sli/Kconfig1
-rw-r--r--src/mainboard/gigabyte/m57sli/cmos.default10
2 files changed, 11 insertions, 0 deletions
diff --git a/src/mainboard/gigabyte/m57sli/Kconfig b/src/mainboard/gigabyte/m57sli/Kconfig
index 6ff33ea4f1..28473776bb 100644
--- a/src/mainboard/gigabyte/m57sli/Kconfig
+++ b/src/mainboard/gigabyte/m57sli/Kconfig
@@ -13,6 +13,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select SUPERIO_ITE_IT8716F_OVERRIDE_FANCTL
select PARALLEL_CPU_INIT
select HAVE_OPTION_TABLE
+ select HAVE_CMOS_DEFAULT
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select LIFT_BSP_APIC_ID
diff --git a/src/mainboard/gigabyte/m57sli/cmos.default b/src/mainboard/gigabyte/m57sli/cmos.default
new file mode 100644
index 0000000000..2514fa0ae7
--- /dev/null
+++ b/src/mainboard/gigabyte/m57sli/cmos.default
@@ -0,0 +1,10 @@
+baud_rate = 115200
+debug_level = Spew
+multi_core = Enable
+slow_cpu = off
+max_mem_clock = 200Mhz
+ECC_memory = Enable
+hw_scrubber = Enable
+interleave_chip_selects = Enable
+power_on_after_fail = Disable
+boot_option = Fallback