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| author | Antonello Dettori <dev@dettori.io> | 2016-09-03 10:45:33 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-09-13 17:16:35 +0200 |
| commit | ef8021cc1b5ae1d090b51d37a2a978276e897b55 (patch) | |
| tree | 4f45762c041fbe77587ccda17eb02806d212ae2b /src/mainboard/gigabyte | |
| parent | 837618bf20b93ffa4fb23db1dde510b221ce90df (diff) | |
| download | coreboot-ef8021cc1b5ae1d090b51d37a2a978276e897b55.tar.xz | |
mainboard/gigabyte/*: transition away from device_t
Replace the use of the old device_t definition inside
mainboard/gigabyte/*.
Change-Id: Ied62d6234a4f6ea5f851e98a098b2c8f4e3db144
Signed-off-by: Antonello Dettori <dev@dettori.io>
Reviewed-on: https://review.coreboot.org/16439
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/gigabyte')
| -rw-r--r-- | src/mainboard/gigabyte/ga-b75m-d3h/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/gigabyte/ga-b75m-d3v/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/gigabyte/ga-g41m-es2l/romstage.c | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/romstage.c b/src/mainboard/gigabyte/ga-b75m-d3h/romstage.c index be6043aa41..dd889d1bd6 100644 --- a/src/mainboard/gigabyte/ga-b75m-d3h/romstage.c +++ b/src/mainboard/gigabyte/ga-b75m-d3h/romstage.c @@ -33,7 +33,7 @@ #include <arch/cpu.h> #include <cpu/x86/msr.h> -static void it8728f_b75md3h_disable_reboot(device_t dev) +static void it8728f_b75md3h_disable_reboot(pnp_devfn_t dev) { /* GPIO SIO settings */ ite_reg_write(dev, 0xEF, 0x7E); // magic diff --git a/src/mainboard/gigabyte/ga-b75m-d3v/romstage.c b/src/mainboard/gigabyte/ga-b75m-d3v/romstage.c index 55a2a96783..fcdac6d2fe 100644 --- a/src/mainboard/gigabyte/ga-b75m-d3v/romstage.c +++ b/src/mainboard/gigabyte/ga-b75m-d3v/romstage.c @@ -33,7 +33,7 @@ #include <arch/cpu.h> #include <cpu/x86/msr.h> -static void it8728f_b75md3v_disable_reboot(device_t dev) +static void it8728f_b75md3v_disable_reboot(pnp_devfn_t dev) { /* GPIO SIO settings */ ite_reg_write(dev, 0xEF, 0x7E); // magic diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c b/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c index b6be8fba7a..2503db9433 100644 --- a/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c +++ b/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c @@ -41,7 +41,7 @@ static void mb_gpio_init(void) { - device_t dev; + pci_devfn_t dev; /* Southbridge GPIOs. */ dev = PCI_DEV(0x0, 0x1f, 0x0); |