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authorMyles Watson <mylesgw@gmail.com>2009-10-16 16:32:57 +0000
committerMyles Watson <mylesgw@gmail.com>2009-10-16 16:32:57 +0000
commit0f61a4fc98f135c0ed22c67ee3241bf5670a61e2 (patch)
treeb3867408477cdf8a3a2374f32d91b4f3936b7486 /src/mainboard/gigabyte
parent9969bdc4fb3d36a39ed9efb67ef0bf638a4e8e09 (diff)
downloadcoreboot-0f61a4fc98f135c0ed22c67ee3241bf5670a61e2.tar.xz
Change CONFIG_LB_MEM_TOPK to CONFIG_RAMTOP to match CONFIG_RAMBASE.
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4788 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/gigabyte')
-rw-r--r--src/mainboard/gigabyte/ga_2761gxdk/Options.lb4
-rw-r--r--src/mainboard/gigabyte/ga_2761gxdk/apc_auto.c2
-rw-r--r--src/mainboard/gigabyte/m57sli/Options.lb4
-rw-r--r--src/mainboard/gigabyte/m57sli/apc_auto.c2
4 files changed, 6 insertions, 6 deletions
diff --git a/src/mainboard/gigabyte/ga_2761gxdk/Options.lb b/src/mainboard/gigabyte/ga_2761gxdk/Options.lb
index 2c18f9da2a..97a8a4ccc2 100644
--- a/src/mainboard/gigabyte/ga_2761gxdk/Options.lb
+++ b/src/mainboard/gigabyte/ga_2761gxdk/Options.lb
@@ -105,7 +105,7 @@ uses CONFIG_LIFT_BSP_APIC_ID
uses CONFIG_PCI_64BIT_PREF_MEM
-uses CONFIG_LB_MEM_TOPK
+uses CONFIG_RAMTOP
uses CONFIG_AP_CODE_IN_CAR
@@ -135,7 +135,7 @@ default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE
default CONFIG_FAILOVER_SIZE=0x01000
#more 1M for pgtbl
-default CONFIG_LB_MEM_TOPK=2048
+default CONFIG_RAMTOP=2048*1024
##
## Build code for the fallback boot
diff --git a/src/mainboard/gigabyte/ga_2761gxdk/apc_auto.c b/src/mainboard/gigabyte/ga_2761gxdk/apc_auto.c
index 6fb051e7c8..90546b45a2 100644
--- a/src/mainboard/gigabyte/ga_2761gxdk/apc_auto.c
+++ b/src/mainboard/gigabyte/ga_2761gxdk/apc_auto.c
@@ -89,7 +89,7 @@ static void post_code(uint8_t value) {
void hardwaremain(int ret_addr)
{
struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in CACHE
- struct sys_info *sysinfox = ((CONFIG_LB_MEM_TOPK<<10) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM
+ struct sys_info *sysinfox = ((CONFIG_RAMTOP) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM
struct node_core_id id;
diff --git a/src/mainboard/gigabyte/m57sli/Options.lb b/src/mainboard/gigabyte/m57sli/Options.lb
index 73b46894f5..0a0d29246a 100644
--- a/src/mainboard/gigabyte/m57sli/Options.lb
+++ b/src/mainboard/gigabyte/m57sli/Options.lb
@@ -105,7 +105,7 @@ uses CONFIG_LIFT_BSP_APIC_ID
uses CONFIG_PCI_64BIT_PREF_MEM
-uses CONFIG_LB_MEM_TOPK
+uses CONFIG_RAMTOP
uses CONFIG_AP_CODE_IN_CAR
@@ -136,7 +136,7 @@ default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE
default CONFIG_FAILOVER_SIZE=0x01000
#more 1M for pgtbl
-default CONFIG_LB_MEM_TOPK=2048
+default CONFIG_RAMTOP=2048*1024
##
## Set-up automatic fan control
diff --git a/src/mainboard/gigabyte/m57sli/apc_auto.c b/src/mainboard/gigabyte/m57sli/apc_auto.c
index d0730b935a..176e6b41ad 100644
--- a/src/mainboard/gigabyte/m57sli/apc_auto.c
+++ b/src/mainboard/gigabyte/m57sli/apc_auto.c
@@ -87,7 +87,7 @@ static void post_code(uint8_t value) {
void hardwaremain(int ret_addr)
{
struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in CACHE
- struct sys_info *sysinfox = ((CONFIG_LB_MEM_TOPK<<10) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM
+ struct sys_info *sysinfox = ((CONFIG_RAMTOP) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM
struct node_core_id id;