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| author | Arthur Heymans <arthur@aheymans.xyz> | 2017-05-12 11:54:08 +0200 |
|---|---|---|
| committer | Arthur Heymans <arthur@aheymans.xyz> | 2017-06-12 11:46:18 +0200 |
| commit | 049347fee0e25c87c3f60b125ee5e03109429fb0 (patch) | |
| tree | 0a3c69cef4722e22b485bd8002d8cd141b683b35 /src/mainboard/gigabyte | |
| parent | 9ed74b54b573d9f26ccd1ec382206c5c0c8048ff (diff) | |
| download | coreboot-049347fee0e25c87c3f60b125ee5e03109429fb0.tar.xz | |
nb/intel/gm45: Add romstage timestamps
Change-Id: I558e6c63caf95ec5279ec5a866b54fb199116469
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/19678
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/mainboard/gigabyte')
0 files changed, 0 insertions, 0 deletions