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authorAngel Pons <th3fanbus@gmail.com>2020-01-01 18:21:49 +0100
committerNico Huber <nico.h@gmx.de>2020-01-05 00:12:03 +0000
commit39930b79c17af04a276662c8796f27323d15ba43 (patch)
tree6b5b514abba9cccbbc7c0de48325cf0396f690bf /src/mainboard/gigabyte
parent32f2ccce41c3ec6aa92284d1eda754434fc8746f (diff)
downloadcoreboot-39930b79c17af04a276662c8796f27323d15ba43.tar.xz
mb/gigabyte/ga-b75m-d3h: Align devicetree lines
Aligned text is easier to read. Change-Id: I66a8efec3587649746bd56cd17eac2a06c9cc500 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38059 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/mainboard/gigabyte')
-rw-r--r--src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb64
-rw-r--r--src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75-d3v/overridetree.cb18
2 files changed, 41 insertions, 41 deletions
diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb b/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb
index 7b470677b0..b5a10fc66e 100644
--- a/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb
+++ b/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb
@@ -21,15 +21,15 @@ chip northbridge/intel/sandybridge
device domain 0 on
subsystemid 0x1458 0x5000 inherit
- device pci 00.0 on # Host bridge
+ device pci 00.0 on # Host bridge
subsystemid 0x1458 0x5000
end
- device pci 01.0 on end # PCIe Bridge for discrete graphics
- device pci 02.0 on # Integrated VGA controller
+ device pci 01.0 on end # PCIe Bridge for discrete graphics
+ device pci 02.0 on # Integrated VGA controller
subsystemid 0x1458 0xd000
end
- chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
+ chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
# GPI routing
register "alt_gp_smi_en" = "0x0000"
register "gen1_dec" = "0x003c0a01"
@@ -45,41 +45,41 @@ chip northbridge/intel/sandybridge
register "docking_supported" = "0"
register "c2_latency" = "0x0065"
- device pci 14.0 on # USB 3.0 Controller
+ device pci 14.0 on # USB 3.0 Controller
subsystemid 0x1458 0x5007
end
- device pci 16.0 on end # Management Engine Interface 1
- device pci 16.1 off end # Management Engine Interface 2
- device pci 16.2 off end # Management Engine IDE-R
- device pci 16.3 off end # Management Engine KT
- device pci 19.0 off end # Intel Gigabit Ethernet
- device pci 1a.0 on # USB2 EHCI #2
+ device pci 16.0 on end # Management Engine Interface 1
+ device pci 16.1 off end # Management Engine Interface 2
+ device pci 16.2 off end # Management Engine IDE-R
+ device pci 16.3 off end # Management Engine KT
+ device pci 19.0 off end # Intel Gigabit Ethernet
+ device pci 1a.0 on # USB2 EHCI #2
subsystemid 0x1458 0x5006
end
- device pci 1b.0 on # High Definition Audio
+ device pci 1b.0 on # High Definition Audio
subsystemid 0x1458 0xa002
end
- device pci 1c.0 on end # PCIe Port #1
- device pci 1c.1 off end # PCIe Port #2
- device pci 1c.2 off end # PCIe Port #3
- device pci 1c.3 off end # PCIe Port #4
- device pci 1c.4 on # PCIe Port #5
- device pci 00.0 on # PCI 10ec:8168
+ device pci 1c.0 on end # PCIe Port #1
+ device pci 1c.1 off end # PCIe Port #2
+ device pci 1c.2 off end # PCIe Port #3
+ device pci 1c.3 off end # PCIe Port #4
+ device pci 1c.4 on # PCIe Port #5
+ device pci 00.0 on # PCI 10ec:8168
subsystemid 0x1458 0xe000
end
end
- device pci 1c.5 off end # PCIe Port #6
- device pci 1c.6 off end # PCIe Port #7
- device pci 1c.7 off end # PCIe Port #8
- device pci 1d.0 on # USB2 EHCI #1
+ device pci 1c.5 off end # PCIe Port #6
+ device pci 1c.6 off end # PCIe Port #7
+ device pci 1c.7 off end # PCIe Port #8
+ device pci 1d.0 on # USB2 EHCI #1
subsystemid 0x1458 0x5006
end
device pci 1e.0 on end # PCI bridge
device pci 1f.0 on # ISA/LPC bridge
subsystemid 0x1458 0x5001
chip superio/ite/it8728f
- device pnp 2e.0 off end # FDC
- device pnp 2e.1 on # Serial Port 1
+ device pnp 2e.0 off end # FDC
+ device pnp 2e.1 on # Serial Port 1
io 0x60 = 0x3f8
irq 0x70 = 4
end
@@ -92,35 +92,35 @@ chip northbridge/intel/sandybridge
irq 0x70 = 7
drq 0x74 = 4
end
- device pnp 2e.4 on # EC
+ device pnp 2e.4 on # EC
io 0x60 = 0xa30
irq 0x70 = 9
io 0x62 = 0xa20
end
- device pnp 2e.5 on # Keyboard
+ device pnp 2e.5 on # Keyboard
io 0x60 = 0x60
irq 0x70 = 1
io 0x62 = 0x64
end
- device pnp 2e.6 on # Mouse
+ device pnp 2e.6 on # Mouse
irq 0x70 = 12
end
- device pnp 2e.7 off end # GPIO
- device pnp 2e.a off end # IR
+ device pnp 2e.7 off end # GPIO
+ device pnp 2e.a off end # IR
end
chip drivers/pc80/tpm
device pnp 0c31.0 on end
end
end
- device pci 1f.2 on # SATA Controller 1
+ device pci 1f.2 on # SATA Controller 1
subsystemid 0x1458 0xb005
end
- device pci 1f.3 on # SMBus
+ device pci 1f.3 on # SMBus
subsystemid 0x1458 0x5001
end
device pci 1f.4 off end
- device pci 1f.5 off end # SATA Controller 2
+ device pci 1f.5 off end # SATA Controller 2
end
end
end
diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75-d3v/overridetree.cb b/src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75-d3v/overridetree.cb
index 2fd3cd545b..b496fe11f0 100644
--- a/src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75-d3v/overridetree.cb
+++ b/src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75-d3v/overridetree.cb
@@ -1,21 +1,21 @@
chip northbridge/intel/sandybridge
device domain 0 on
- chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
- device pci 16.0 off end # Management Engine Interface 1
+ chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
+ device pci 16.0 off end # Management Engine Interface 1
register "xhci_overcurrent_mapping" = "0x00000c03"
- device pci 1c.1 on end # PCIe Port #2
+ device pci 1c.1 on end # PCIe Port #2
device pci 1c.2 on
- device pci 00.0 on # PCI 1969:1091
+ device pci 00.0 on # PCI 1969:1091
subsystemid 0x1458 0xe000
end
end # PCIe Port #3
- device pci 1c.3 on end # PCIe Port #4
- device pci 1c.4 on end # PCIe Port #5
- device pci 1f.0 on # ISA/LPC bridge
+ device pci 1c.3 on end # PCIe Port #4
+ device pci 1c.4 on end # PCIe Port #5
+ device pci 1f.0 on # ISA/LPC bridge
subsystemid 0x1458 0x5001
chip superio/ite/it8728f
- device pnp 2e.2 off end # COM2
- device pnp 2e.3 off end # LPT
+ device pnp 2e.2 off end # COM2
+ device pnp 2e.3 off end # LPT
end
end
end