summaryrefslogtreecommitdiff
path: root/src/mainboard/gigabyte
diff options
context:
space:
mode:
authorUwe Hermann <uwe@hermann-uwe.de>2010-09-24 18:18:20 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2010-09-24 18:18:20 +0000
commitb015d02a857b27a65a3ef52839361236645754d2 (patch)
tree25f3b2b53a2d9dc4e91b1fd2004ed9454d325344 /src/mainboard/gigabyte
parent8a6163e02b7fcbbeb0d3e88569a5df8bc3c7b072 (diff)
downloadcoreboot-b015d02a857b27a65a3ef52839361236645754d2.tar.xz
Hook up all AMD SB600/SB700 boards to the EHCI Debug Port infrastructure.
Without a (currently) dummy set_debug_port() function the build fails, this may or may not be fixed differently in the future. Manually build-tested on all SB600/SB700 boards, and tested on hardware on one SB600 board I own, works fine. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5833 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/gigabyte')
-rw-r--r--src/mainboard/gigabyte/ma785gmt/romstage.c12
-rw-r--r--src/mainboard/gigabyte/ma78gm/romstage.c12
2 files changed, 24 insertions, 0 deletions
diff --git a/src/mainboard/gigabyte/ma785gmt/romstage.c b/src/mainboard/gigabyte/ma785gmt/romstage.c
index 990b30d301..9e221fc948 100644
--- a/src/mainboard/gigabyte/ma785gmt/romstage.c
+++ b/src/mainboard/gigabyte/ma785gmt/romstage.c
@@ -56,6 +56,12 @@
static int smbus_read_byte(u32 device, u32 address);
#include "superio/ite/it8718f/it8718f_early_serial.c"
+
+#if CONFIG_USBDEBUG
+#include "southbridge/amd/sb700/sb700_enable_usbdebug.c"
+#include "pc80/usbdebug_serial.c"
+#endif
+
#include "cpu/x86/mtrr/earlymtrr.c"
#include <cpu/amd/mtrr.h>
#include "northbridge/amd/amdfam10/setup_resource_map.c"
@@ -134,6 +140,12 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
it8718f_enable_serial(0, CONFIG_TTYS0_BASE);
it8718f_disable_reboot();
uart_init();
+
+#if CONFIG_USBDEBUG
+ sb700_enable_usbdebug(0);
+ early_usbdebug_init();
+#endif
+
console_init();
printk(BIOS_DEBUG, "\n");
diff --git a/src/mainboard/gigabyte/ma78gm/romstage.c b/src/mainboard/gigabyte/ma78gm/romstage.c
index aadd51e971..56133accd1 100644
--- a/src/mainboard/gigabyte/ma78gm/romstage.c
+++ b/src/mainboard/gigabyte/ma78gm/romstage.c
@@ -60,6 +60,12 @@
static int smbus_read_byte(u32 device, u32 address);
#include "superio/ite/it8718f/it8718f_early_serial.c"
+
+#if CONFIG_USBDEBUG
+#include "southbridge/amd/sb700/sb700_enable_usbdebug.c"
+#include "pc80/usbdebug_serial.c"
+#endif
+
#include "cpu/x86/mtrr/earlymtrr.c"
#include <cpu/amd/mtrr.h>
#include "northbridge/amd/amdfam10/setup_resource_map.c"
@@ -138,6 +144,12 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
it8718f_enable_serial(0, CONFIG_TTYS0_BASE);
it8718f_disable_reboot();
uart_init();
+
+#if CONFIG_USBDEBUG
+ sb700_enable_usbdebug(0);
+ early_usbdebug_init();
+#endif
+
console_init();
printk(BIOS_DEBUG, "\n");