ACPI: Remove CONFIG_GENERATE_ACPI_TABLES

As currently many systems would be barely functional without ACPI,
always generate ACPI tables if supported.

Change-Id: I372dbd03101030c904dab153552a1291f3b63518
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/4609
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>

3 files changed, 0 insertions, 171 deletions

diff --git a/src/mainboard/gigabyte/ma785gm/mptable.c b/src/mainboard/gigabyte/ma785gm/mptable.c
index c4ec478413..11426c2343 100644
--- a/src/mainboard/gigabyte/ma785gm/mptable.c
+++ b/src/mainboard/gigabyte/ma785gm/mptable.c
@@ -97,63 +97,6 @@ static void *smp_write_config_table(void *v)
 
 	mptable_add_isa_interrupts(mc, bus_isa, apicid_sb700, 0);
 
-	/* PCI interrupts are level triggered, and are
-	 * associated with a specific bus/device/function tuple.
-	 */
-#if !CONFIG_GENERATE_ACPI_TABLES
-#define PCI_INT(bus, dev, fn, pin) \
-        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), apicid_sb700, (pin))
-#else
-#define PCI_INT(bus, dev, fn, pin)
-#endif
-
-	/* usb */
-	PCI_INT(0x0, 0x12, 0x0, 0x10); /* USB */
-	PCI_INT(0x0, 0x12, 0x1, 0x11);
-	PCI_INT(0x0, 0x13, 0x0, 0x12);
-	PCI_INT(0x0, 0x13, 0x1, 0x13);
-	PCI_INT(0x0, 0x14, 0x0, 0x10);
-
-	/* sata */
-	PCI_INT(0x0, 0x11, 0x0, 0x16);
-
-	/* HD Audio: b0:d20:f1:reg63 should be 0. */
-	/* PCI_INT(0x0, 0x14, 0x2, 0x12); */
-
-	/* on board NIC & Slot PCIE.  */
-	/* PCI_INT(bus_rs780[0x1], 0x5, 0x0, 0x12); */
-/* 	PCI_INT(bus_rs780[0x1], 0x5, 0x1, 0x13); */
-	PCI_INT(bus_rs780[0x2], 0x0, 0x0, 0x12); /* Dev 2, external GFX */
-	/* PCI_INT(bus_rs780[0x3], 0x0, 0x0, 0x13); */
-	PCI_INT(bus_rs780[0x4], 0x0, 0x0, 0x10);
-	/* configuration B doesnt need dev 5,6,7 */
-	/*
-	 * PCI_INT(bus_rs780[0x5], 0x0, 0x0, 0x11);
-	 * PCI_INT(bus_rs780[0x6], 0x0, 0x0, 0x12);
-	 * PCI_INT(bus_rs780[0x7], 0x0, 0x0, 0x13);
-	 */
-	PCI_INT(bus_rs780[0x9], 0x0, 0x0, 0x11);
-	PCI_INT(bus_rs780[0xA], 0x0, 0x0, 0x12); /* NIC */
-
-	/* PCI slots */
-	/* PCI_SLOT 0. */
-	PCI_INT(bus_sb700[1], 0x5, 0x0, 0x14);
-	PCI_INT(bus_sb700[1], 0x5, 0x1, 0x15);
-	PCI_INT(bus_sb700[1], 0x5, 0x2, 0x16);
-	PCI_INT(bus_sb700[1], 0x5, 0x3, 0x17);
-
-	/* PCI_SLOT 1. */
-	PCI_INT(bus_sb700[1], 0x6, 0x0, 0x15);
-	PCI_INT(bus_sb700[1], 0x6, 0x1, 0x16);
-	PCI_INT(bus_sb700[1], 0x6, 0x2, 0x17);
-	PCI_INT(bus_sb700[1], 0x6, 0x3, 0x14);
-
-	/* PCI_SLOT 2. */
-	PCI_INT(bus_sb700[1], 0x7, 0x0, 0x16);
-	PCI_INT(bus_sb700[1], 0x7, 0x1, 0x17);
-	PCI_INT(bus_sb700[1], 0x7, 0x2, 0x14);
-	PCI_INT(bus_sb700[1], 0x7, 0x3, 0x15);
-
 	/*Local Ints:   Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN# */
 	IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0);
 	IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1);
diff --git a/src/mainboard/gigabyte/ma785gmt/mptable.c b/src/mainboard/gigabyte/ma785gmt/mptable.c
index c4ec478413..11426c2343 100644
--- a/src/mainboard/gigabyte/ma785gmt/mptable.c
+++ b/src/mainboard/gigabyte/ma785gmt/mptable.c
@@ -97,63 +97,6 @@ static void *smp_write_config_table(void *v)
 
 	mptable_add_isa_interrupts(mc, bus_isa, apicid_sb700, 0);
 
-	/* PCI interrupts are level triggered, and are
-	 * associated with a specific bus/device/function tuple.
-	 */
-#if !CONFIG_GENERATE_ACPI_TABLES
-#define PCI_INT(bus, dev, fn, pin) \
-        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), apicid_sb700, (pin))
-#else
-#define PCI_INT(bus, dev, fn, pin)
-#endif
-
-	/* usb */
-	PCI_INT(0x0, 0x12, 0x0, 0x10); /* USB */
-	PCI_INT(0x0, 0x12, 0x1, 0x11);
-	PCI_INT(0x0, 0x13, 0x0, 0x12);
-	PCI_INT(0x0, 0x13, 0x1, 0x13);
-	PCI_INT(0x0, 0x14, 0x0, 0x10);
-
-	/* sata */
-	PCI_INT(0x0, 0x11, 0x0, 0x16);
-
-	/* HD Audio: b0:d20:f1:reg63 should be 0. */
-	/* PCI_INT(0x0, 0x14, 0x2, 0x12); */
-
-	/* on board NIC & Slot PCIE.  */
-	/* PCI_INT(bus_rs780[0x1], 0x5, 0x0, 0x12); */
-/* 	PCI_INT(bus_rs780[0x1], 0x5, 0x1, 0x13); */
-	PCI_INT(bus_rs780[0x2], 0x0, 0x0, 0x12); /* Dev 2, external GFX */
-	/* PCI_INT(bus_rs780[0x3], 0x0, 0x0, 0x13); */
-	PCI_INT(bus_rs780[0x4], 0x0, 0x0, 0x10);
-	/* configuration B doesnt need dev 5,6,7 */
-	/*
-	 * PCI_INT(bus_rs780[0x5], 0x0, 0x0, 0x11);
-	 * PCI_INT(bus_rs780[0x6], 0x0, 0x0, 0x12);
-	 * PCI_INT(bus_rs780[0x7], 0x0, 0x0, 0x13);
-	 */
-	PCI_INT(bus_rs780[0x9], 0x0, 0x0, 0x11);
-	PCI_INT(bus_rs780[0xA], 0x0, 0x0, 0x12); /* NIC */
-
-	/* PCI slots */
-	/* PCI_SLOT 0. */
-	PCI_INT(bus_sb700[1], 0x5, 0x0, 0x14);
-	PCI_INT(bus_sb700[1], 0x5, 0x1, 0x15);
-	PCI_INT(bus_sb700[1], 0x5, 0x2, 0x16);
-	PCI_INT(bus_sb700[1], 0x5, 0x3, 0x17);
-
-	/* PCI_SLOT 1. */
-	PCI_INT(bus_sb700[1], 0x6, 0x0, 0x15);
-	PCI_INT(bus_sb700[1], 0x6, 0x1, 0x16);
-	PCI_INT(bus_sb700[1], 0x6, 0x2, 0x17);
-	PCI_INT(bus_sb700[1], 0x6, 0x3, 0x14);
-
-	/* PCI_SLOT 2. */
-	PCI_INT(bus_sb700[1], 0x7, 0x0, 0x16);
-	PCI_INT(bus_sb700[1], 0x7, 0x1, 0x17);
-	PCI_INT(bus_sb700[1], 0x7, 0x2, 0x14);
-	PCI_INT(bus_sb700[1], 0x7, 0x3, 0x15);
-
 	/*Local Ints:   Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN# */
 	IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0);
 	IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1);
diff --git a/src/mainboard/gigabyte/ma78gm/mptable.c b/src/mainboard/gigabyte/ma78gm/mptable.c
index c4ec478413..11426c2343 100644
--- a/src/mainboard/gigabyte/ma78gm/mptable.c
+++ b/src/mainboard/gigabyte/ma78gm/mptable.c
@@ -97,63 +97,6 @@ static void *smp_write_config_table(void *v)
 
 	mptable_add_isa_interrupts(mc, bus_isa, apicid_sb700, 0);
 
-	/* PCI interrupts are level triggered, and are
-	 * associated with a specific bus/device/function tuple.
-	 */
-#if !CONFIG_GENERATE_ACPI_TABLES
-#define PCI_INT(bus, dev, fn, pin) \
-        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), apicid_sb700, (pin))
-#else
-#define PCI_INT(bus, dev, fn, pin)
-#endif
-
-	/* usb */
-	PCI_INT(0x0, 0x12, 0x0, 0x10); /* USB */
-	PCI_INT(0x0, 0x12, 0x1, 0x11);
-	PCI_INT(0x0, 0x13, 0x0, 0x12);
-	PCI_INT(0x0, 0x13, 0x1, 0x13);
-	PCI_INT(0x0, 0x14, 0x0, 0x10);
-
-	/* sata */
-	PCI_INT(0x0, 0x11, 0x0, 0x16);
-
-	/* HD Audio: b0:d20:f1:reg63 should be 0. */
-	/* PCI_INT(0x0, 0x14, 0x2, 0x12); */
-
-	/* on board NIC & Slot PCIE.  */
-	/* PCI_INT(bus_rs780[0x1], 0x5, 0x0, 0x12); */
-/* 	PCI_INT(bus_rs780[0x1], 0x5, 0x1, 0x13); */
-	PCI_INT(bus_rs780[0x2], 0x0, 0x0, 0x12); /* Dev 2, external GFX */
-	/* PCI_INT(bus_rs780[0x3], 0x0, 0x0, 0x13); */
-	PCI_INT(bus_rs780[0x4], 0x0, 0x0, 0x10);
-	/* configuration B doesnt need dev 5,6,7 */
-	/*
-	 * PCI_INT(bus_rs780[0x5], 0x0, 0x0, 0x11);
-	 * PCI_INT(bus_rs780[0x6], 0x0, 0x0, 0x12);
-	 * PCI_INT(bus_rs780[0x7], 0x0, 0x0, 0x13);
-	 */
-	PCI_INT(bus_rs780[0x9], 0x0, 0x0, 0x11);
-	PCI_INT(bus_rs780[0xA], 0x0, 0x0, 0x12); /* NIC */
-
-	/* PCI slots */
-	/* PCI_SLOT 0. */
-	PCI_INT(bus_sb700[1], 0x5, 0x0, 0x14);
-	PCI_INT(bus_sb700[1], 0x5, 0x1, 0x15);
-	PCI_INT(bus_sb700[1], 0x5, 0x2, 0x16);
-	PCI_INT(bus_sb700[1], 0x5, 0x3, 0x17);
-
-	/* PCI_SLOT 1. */
-	PCI_INT(bus_sb700[1], 0x6, 0x0, 0x15);
-	PCI_INT(bus_sb700[1], 0x6, 0x1, 0x16);
-	PCI_INT(bus_sb700[1], 0x6, 0x2, 0x17);
-	PCI_INT(bus_sb700[1], 0x6, 0x3, 0x14);
-
-	/* PCI_SLOT 2. */
-	PCI_INT(bus_sb700[1], 0x7, 0x0, 0x16);
-	PCI_INT(bus_sb700[1], 0x7, 0x1, 0x17);
-	PCI_INT(bus_sb700[1], 0x7, 0x2, 0x14);
-	PCI_INT(bus_sb700[1], 0x7, 0x3, 0x15);
-
 	/*Local Ints:   Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN# */
 	IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0);
 	IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1);