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authorKyösti Mälkki <kyosti.malkki@gmail.com>2015-02-05 15:48:38 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2015-06-05 10:17:35 +0200
commit7748ee5ee188bf6b3846501b32a9ae82ccb8e853 (patch)
treeb795bbb255aeb0345f744fce4a41a0d433c0f01b /src/mainboard/gigabyte
parent98a915e2621df4885ba42f09502775f1f4a288b4 (diff)
downloadcoreboot-7748ee5ee188bf6b3846501b32a9ae82ccb8e853.tar.xz
AMD K8 fam10: Refactor Kconfig SB_HT_CHAIN_ON_BUS0
If SB_HT_CHAIN_ON_BUS0 is selected, HyperTransport chain for System Bus is the first to scan and it will be assigned with bus number 0. If HT_CHAIN_DISTRIBUTE is selected, each link will reserve a fixed range of bus numbers instead of assigning consecutive numbers across all the links. All fam10 have SB_HT_CHAIN_ON_BUS0 selected under northbridge. Follow-up can easily drop this if we find this is dictated by architecture. Change-Id: I8deddcb4c3fd679b6b27e2879d9dba3895c4dd6f Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/8366 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com> Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Diffstat (limited to 'src/mainboard/gigabyte')
-rw-r--r--src/mainboard/gigabyte/ga_2761gxdk/Kconfig5
-rw-r--r--src/mainboard/gigabyte/m57sli/Kconfig5
-rw-r--r--src/mainboard/gigabyte/ma785gm/Kconfig4
-rw-r--r--src/mainboard/gigabyte/ma785gmt/Kconfig4
-rw-r--r--src/mainboard/gigabyte/ma78gm/Kconfig4
5 files changed, 2 insertions, 20 deletions
diff --git a/src/mainboard/gigabyte/ga_2761gxdk/Kconfig b/src/mainboard/gigabyte/ga_2761gxdk/Kconfig
index a79c28f5ca..e182c996e2 100644
--- a/src/mainboard/gigabyte/ga_2761gxdk/Kconfig
+++ b/src/mainboard/gigabyte/ga_2761gxdk/Kconfig
@@ -6,6 +6,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select DIMM_DDR2
select NORTHBRIDGE_AMD_AMDK8
select SOUTHBRIDGE_SIS_SIS966
+ select HT_CHAIN_DISTRIBUTE
select SUPERIO_ITE_IT8716F
select PARALLEL_CPU_INIT
select HAVE_OPTION_TABLE
@@ -37,10 +38,6 @@ config MEM_TRAIN_SEQ
int
default 2
-config SB_HT_CHAIN_ON_BUS0
- int
- default 2
-
config MAINBOARD_PART_NUMBER
string
default "GA-2761GXDK"
diff --git a/src/mainboard/gigabyte/m57sli/Kconfig b/src/mainboard/gigabyte/m57sli/Kconfig
index 6ef94ce201..cc8be43ed8 100644
--- a/src/mainboard/gigabyte/m57sli/Kconfig
+++ b/src/mainboard/gigabyte/m57sli/Kconfig
@@ -6,6 +6,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select DIMM_DDR2
select NORTHBRIDGE_AMD_AMDK8
select SOUTHBRIDGE_NVIDIA_MCP55
+ select HT_CHAIN_DISTRIBUTE
select MCP55_USE_NIC
select MCP55_USE_AZA
select SUPERIO_ITE_IT8716F
@@ -41,10 +42,6 @@ config MEM_TRAIN_SEQ
int
default 2
-config SB_HT_CHAIN_ON_BUS0
- int
- default 2
-
config MAINBOARD_PART_NUMBER
string
default "GA-M57SLI-S4"
diff --git a/src/mainboard/gigabyte/ma785gm/Kconfig b/src/mainboard/gigabyte/ma785gm/Kconfig
index 8f44e7689a..bf441e9d29 100644
--- a/src/mainboard/gigabyte/ma785gm/Kconfig
+++ b/src/mainboard/gigabyte/ma785gm/Kconfig
@@ -40,10 +40,6 @@ config MAX_PHYSICAL_CPUS
int
default 2
-config SB_HT_CHAIN_ON_BUS0
- int
- default 1
-
config HT_CHAIN_END_UNITID_BASE
hex
default 0x1
diff --git a/src/mainboard/gigabyte/ma785gmt/Kconfig b/src/mainboard/gigabyte/ma785gmt/Kconfig
index 03b9237583..827c8da6bf 100644
--- a/src/mainboard/gigabyte/ma785gmt/Kconfig
+++ b/src/mainboard/gigabyte/ma785gmt/Kconfig
@@ -40,10 +40,6 @@ config MAX_PHYSICAL_CPUS
int
default 2
-config SB_HT_CHAIN_ON_BUS0
- int
- default 1
-
config HT_CHAIN_END_UNITID_BASE
hex
default 0x1
diff --git a/src/mainboard/gigabyte/ma78gm/Kconfig b/src/mainboard/gigabyte/ma78gm/Kconfig
index 32421e8bd4..3d85708477 100644
--- a/src/mainboard/gigabyte/ma78gm/Kconfig
+++ b/src/mainboard/gigabyte/ma78gm/Kconfig
@@ -40,10 +40,6 @@ config MAX_PHYSICAL_CPUS
int
default 2
-config SB_HT_CHAIN_ON_BUS0
- int
- default 1
-
config HT_CHAIN_END_UNITID_BASE
hex
default 0x1