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authorKyösti Mälkki <kyosti.malkki@gmail.com>2015-03-17 06:42:54 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2015-06-10 05:48:37 +0200
commitfcbebb61c59e2af7aacc03a6215650a0369d4c69 (patch)
tree6f4a202882d15f5f0965457452d37df3a4e01edf /src/mainboard/gigabyte
parent58e26c74e085d6a52d26ec950f1aaf711c3ef0b1 (diff)
downloadcoreboot-fcbebb61c59e2af7aacc03a6215650a0369d4c69.tar.xz
PCI subsystem: Drop PCI_64BIT_PREF_MEM option
No board in the tree selects this and it looks like the implementation was done at chipset level while it should be part of PCI subsystem. When enabled, at least AMD K8 and f14, f15tn and f16kb fail build test. Feature of placing prefetchable PCI memory above 4GB may not work if there is any 32-bit only prefetchable PCI BARs in the system. Change-Id: I40ded2c7d6d05f461423721aa5d78a78f9f9ce1e Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/8705 Tested-by: build bot (Jenkins) Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/gigabyte')
-rw-r--r--src/mainboard/gigabyte/ga_2761gxdk/Kconfig4
-rw-r--r--src/mainboard/gigabyte/m57sli/Kconfig4
2 files changed, 0 insertions, 8 deletions
diff --git a/src/mainboard/gigabyte/ga_2761gxdk/Kconfig b/src/mainboard/gigabyte/ga_2761gxdk/Kconfig
index e182c996e2..d6eddff719 100644
--- a/src/mainboard/gigabyte/ga_2761gxdk/Kconfig
+++ b/src/mainboard/gigabyte/ga_2761gxdk/Kconfig
@@ -42,10 +42,6 @@ config MAINBOARD_PART_NUMBER
string
default "GA-2761GXDK"
-config PCI_64BIT_PREF_MEM
- bool
- default n
-
config MAX_CPUS
int
default 2
diff --git a/src/mainboard/gigabyte/m57sli/Kconfig b/src/mainboard/gigabyte/m57sli/Kconfig
index cc8be43ed8..6ff33ea4f1 100644
--- a/src/mainboard/gigabyte/m57sli/Kconfig
+++ b/src/mainboard/gigabyte/m57sli/Kconfig
@@ -46,10 +46,6 @@ config MAINBOARD_PART_NUMBER
string
default "GA-M57SLI-S4"
-config PCI_64BIT_PREF_MEM
- bool
- default n
-
config MAX_CPUS
int
default 2