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authorElyes HAOUAS <ehaouas@noos.fr>2018-02-01 08:30:22 +0100
committerFelix Held <felix-coreboot@felixheld.de>2018-04-29 17:03:19 +0000
commitcee9b6ee30b815f4e2facbca76ec416969223401 (patch)
treededcfe113fc949bc908f596d16702a771e426e5e /src/mainboard/gigabyte
parentc4f897ee3cfc192ab77a3fa891e062d64e2bcedc (diff)
downloadcoreboot-cee9b6ee30b815f4e2facbca76ec416969223401.tar.xz
mainboard/gigabyte/ga_2761gxdk: Remove unnecessary braces {}
Fix coding style Change-Id: Id1c7104eb8520f20c826f5936029739a093d4dba Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/23529 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/mainboard/gigabyte')
-rw-r--r--src/mainboard/gigabyte/ga_2761gxdk/mptable.c13
1 files changed, 6 insertions, 7 deletions
diff --git a/src/mainboard/gigabyte/ga_2761gxdk/mptable.c b/src/mainboard/gigabyte/ga_2761gxdk/mptable.c
index 15442057f5..991f24e800 100644
--- a/src/mainboard/gigabyte/ga_2761gxdk/mptable.c
+++ b/src/mainboard/gigabyte/ga_2761gxdk/mptable.c
@@ -88,17 +88,16 @@ static void *smp_write_config_table(void *v)
PCI_INT(0, sbdn+5, 2, 0x15); // 21
PCI_INT(0, sbdn+8, 0, 0x16); // 22
- for(j = 7; j >= 2; j--) {
- if(!bus_sis966[j]) continue;
- for(i = 0; i < 4; i++) {
+ for (j = 7; j >= 2; j--) {
+ if (!bus_sis966[j])
+ continue;
+ for (i = 0; i < 4; i++)
PCI_INT(j, 0x00, i, 0x10 + (2+j+i+4-sbdn%4)%4);
- }
}
- for(j = 0; j < 2; j++)
- for(i = 0; i < 4; i++) {
+ for (j = 0; j < 2; j++)
+ for (i = 0; i < 4; i++)
PCI_INT(1, 0x06+j, i, 0x10 + (2+i+j)%4);
- }
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
mptable_lintsrc(mc, bus_isa);