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authorFelix Held <felix-coreboot@felixheld.de>2015-10-17 13:16:27 +0200
committerDavid Hendricks <dhendrix@chromium.org>2015-10-23 20:44:06 +0200
commit421b47e05059d3dbcd2ed06be60f574fdbe69b15 (patch)
treede05b7dc91727d5091111fcedd6b1c699b166258 /src/mainboard/gizmosphere
parent907ea331f2b2769331982fc373f55c5c86146c4b (diff)
downloadcoreboot-421b47e05059d3dbcd2ed06be60f574fdbe69b15.tar.xz
SB800-mainboards: use write8 to disable unused GPP CLK
don't use non-volatile pointers for MMIO access Change-Id: I9f38012a806e43f2535265f1d25537c59b53904e Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: http://review.coreboot.org/12081 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard/gizmosphere')
-rw-r--r--src/mainboard/gizmosphere/gizmo/mainboard.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/gizmosphere/gizmo/mainboard.c b/src/mainboard/gizmosphere/gizmo/mainboard.c
index 82de7527b6..d04a0aaca2 100644
--- a/src/mainboard/gizmosphere/gizmo/mainboard.c
+++ b/src/mainboard/gizmosphere/gizmo/mainboard.c
@@ -62,11 +62,11 @@ static void mainboard_enable(device_t dev)
/* enable GPP CLK0 thru CLK1 */
/* disable GPP CLK2 thru SLT_GFX_CLK */
u8 *misc_mem_clk_cntrl = (u8 *)(ACPI_MMIO_BASE + MISC_BASE);
- *(misc_mem_clk_cntrl + 0) = 0xFF;
- *(misc_mem_clk_cntrl + 1) = 0x00;
- *(misc_mem_clk_cntrl + 2) = 0x00;
- *(misc_mem_clk_cntrl + 3) = 0x00;
- *(misc_mem_clk_cntrl + 4) = 0x00;
+ write8(misc_mem_clk_cntrl + 0, 0xFF);
+ write8(misc_mem_clk_cntrl + 1, 0x00);
+ write8(misc_mem_clk_cntrl + 2, 0x00);
+ write8(misc_mem_clk_cntrl + 3, 0x00);
+ write8(misc_mem_clk_cntrl + 4, 0x00);
/*
* Force the onboard SATA port to GEN2 speed.