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| author | Marc Jones <marc.jones@se-eng.com> | 2015-06-09 21:18:38 -0600 |
|---|---|---|
| committer | Marc Jones <marc.jones@se-eng.com> | 2015-06-13 18:09:20 +0200 |
| commit | d862121fbe6285be2f91a0c09058a22a775c0d19 (patch) | |
| tree | 4ef78f4c720e49a81303f81ccfa957d2fcd64bf1 /src/mainboard/google/auron/Kconfig | |
| parent | f2dfef01e1fdf9d8218f0bc6ecfc3f943dc4d2a1 (diff) | |
| download | coreboot-d862121fbe6285be2f91a0c09058a22a775c0d19.tar.xz | |
google/auron: Add mainboard
Add the Google Auron Broadwell Reference Mainboard. It is based
on the Google Peppy mainboard. It was merged from the following
chromium.org commit: d20a1d1a22d64546a5d8761b18ab29732ec0b848
Change-Id: I716a79e198e91c428bd965fcd03665c2c7067602
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/10500
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google/auron/Kconfig')
| -rw-r--r-- | src/mainboard/google/auron/Kconfig | 39 |
1 files changed, 24 insertions, 15 deletions
diff --git a/src/mainboard/google/auron/Kconfig b/src/mainboard/google/auron/Kconfig index 2c1560aad4..779e6b37b6 100644 --- a/src/mainboard/google/auron/Kconfig +++ b/src/mainboard/google/auron/Kconfig @@ -1,12 +1,8 @@ -if BOARD_GOOGLE_PEPPY +if BOARD_GOOGLE_AURON config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select SYSTEM_TYPE_LAPTOP - select CPU_INTEL_HASWELL - select NORTHBRIDGE_INTEL_HASWELL - select SOUTHBRIDGE_INTEL_LYNXPOINT - select INTEL_LYNXPOINT_LP + select SOC_INTEL_BROADWELL select BOARD_ROMSIZE_KB_8192 select EC_GOOGLE_CHROMEEC select EC_SOFTWARE_SYNC @@ -19,24 +15,32 @@ config BOARD_SPECIFIC_OPTIONS # dummy select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_LPC_TPM select EXTERNAL_MRC_BLOB - select MAINBOARD_HAS_NATIVE_VGA_INIT - select MAINBOARD_DO_NATIVE_VGA_INIT - select INTEL_DP - select INTEL_DDI + select CACHE_ROM + select MARK_GRAPHICS_MEM_WRCOMB + select CHROMEOS_RAMOOPS_DYNAMIC select INTEL_INT15 + select LID_SWITCH select CHROMEOS_VBNV_CMOS +config VBOOT_RAMSTAGE_INDEX + hex + default 0x2 + +config VBOOT_REFCODE_INDEX + hex + default 0x3 + config MAINBOARD_DIR string - default google/peppy + default google/auron config MAINBOARD_PART_NUMBER string - default "Peppy" + default "Auron" -config MMCONF_BASE_ADDRESS - hex - default 0xf0000000 +config IRQ_SLOT_COUNT + int + default 18 config MAX_CPUS int @@ -54,4 +58,9 @@ config HAVE_ME_BIN bool default n + +config MAINBOARD_FAMILY + string + depends on GENERATE_SMBIOS_TABLES + default "Google_Auron" endif |