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authorMarc Jones <marc.jones@se-eng.com>2015-06-09 21:18:38 -0600
committerMarc Jones <marc.jones@se-eng.com>2015-06-13 18:09:20 +0200
commitd862121fbe6285be2f91a0c09058a22a775c0d19 (patch)
tree4ef78f4c720e49a81303f81ccfa957d2fcd64bf1 /src/mainboard/google/auron/acpi
parentf2dfef01e1fdf9d8218f0bc6ecfc3f943dc4d2a1 (diff)
downloadcoreboot-d862121fbe6285be2f91a0c09058a22a775c0d19.tar.xz
google/auron: Add mainboard
Add the Google Auron Broadwell Reference Mainboard. It is based on the Google Peppy mainboard. It was merged from the following chromium.org commit: d20a1d1a22d64546a5d8761b18ab29732ec0b848 Change-Id: I716a79e198e91c428bd965fcd03665c2c7067602 Signed-off-by: Marc Jones <marc.jones@se-eng.com> Reviewed-on: http://review.coreboot.org/10500 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google/auron/acpi')
-rw-r--r--src/mainboard/google/auron/acpi/chromeos.asl6
-rw-r--r--src/mainboard/google/auron/acpi/ec.asl4
-rw-r--r--src/mainboard/google/auron/acpi/mainboard.asl238
-rw-r--r--src/mainboard/google/auron/acpi/superio.asl4
-rw-r--r--src/mainboard/google/auron/acpi/thermal.asl41
-rw-r--r--src/mainboard/google/auron/acpi/video.asl43
6 files changed, 299 insertions, 37 deletions
diff --git a/src/mainboard/google/auron/acpi/chromeos.asl b/src/mainboard/google/auron/acpi/chromeos.asl
index 9db5509ad3..d9297178d4 100644
--- a/src/mainboard/google/auron/acpi/chromeos.asl
+++ b/src/mainboard/google/auron/acpi/chromeos.asl
@@ -1,7 +1,7 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2012 Google Inc.
+ * Copyright (C) 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -18,6 +18,6 @@
*/
Name(OIPG, Package() {
- Package () { 0x0001, 0, 0xFFFFFFFF, "LynxPoint" }, // no recovery button
- Package () { 0x0003, 1, 58, "LynxPoint" }, // firmware write protect
+ Package () { 0x0001, 0, 0xFFFFFFFF, "PCH-LP" }, // no recovery button
+ Package () { 0x0003, 1, 58, "PCH-LP" }, // firmware write protect
})
diff --git a/src/mainboard/google/auron/acpi/ec.asl b/src/mainboard/google/auron/acpi/ec.asl
index d8b62867fd..712da33f42 100644
--- a/src/mainboard/google/auron/acpi/ec.asl
+++ b/src/mainboard/google/auron/acpi/ec.asl
@@ -1,7 +1,7 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2012 Google Inc.
+ * Copyright (C) 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -18,7 +18,7 @@
*/
/* mainboard configuration */
-#include <mainboard/google/peppy/ec.h>
+#include "ec.h"
/* ACPI code for EC functions */
#include <ec/google/chromeec/acpi/ec.asl>
diff --git a/src/mainboard/google/auron/acpi/mainboard.asl b/src/mainboard/google/auron/acpi/mainboard.asl
index 3406e8c5b5..8461a9d459 100644
--- a/src/mainboard/google/auron/acpi/mainboard.asl
+++ b/src/mainboard/google/auron/acpi/mainboard.asl
@@ -1,7 +1,7 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2012 Google Inc.
+ * Copyright (C) 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
@@ -18,7 +18,7 @@
* Foundation, Inc.
*/
-#include <mainboard/google/peppy/onboard.h>
+#include <mainboard/google/auron/onboard.h>
Scope (\_SB)
{
@@ -30,68 +30,190 @@ Scope (\_SB)
Store (\_SB.PCI0.LPCB.EC0.LIDS, \LIDS)
Return (\LIDS)
}
+
+
+ // There is no GPIO for LID, the EC pulses WAKE# pin instead.
+ // There is no GPE for WAKE#, so fake it with PCI_EXP_WAKE
+ Name (_PRW, Package(){ 0x69, 5 }) // PCI_EXP
}
Device (PWRB)
{
Name(_HID, EisaId("PNP0C0C"))
}
+}
- Device (TPAD)
+/*
+ * LPC Trusted Platform Module
+ */
+Scope (\_SB.PCI0.LPCB)
{
- Name (_ADR, 0x0)
- Name (_UID, 1)
+ #include <drivers/pc80/tpm/acpi/tpm.asl>
+}
- // Report as a Sleep Button device so Linux will
- // automatically enable it as a wake source
- Name (_HID, EisaId("PNP0C0E"))
+Scope (\_SB.PCI0.I2C0)
+{
+ Device (ETPA)
+ {
+ Name (_HID, "ELAN0000")
+ Name (_DDN, "Elan Touchpad")
+ Name (_UID, 1)
+ Name (ISTP, 1) /* Touchpad */
Name (_CRS, ResourceTemplate()
{
+ I2cSerialBus (
+ 0x15, // SlaveAddress
+ ControllerInitiated, // SlaveMode
+ 400000, // ConnectionSpeed
+ AddressingMode7Bit, // AddressingMode
+ "\\_SB.PCI0.I2C0", // ResourceSource
+ )
Interrupt (ResourceConsumer, Edge, ActiveLow)
{
BOARD_TRACKPAD_IRQ
}
+ })
- VendorShort (ADDR)
+ Method (_STA)
{
- BOARD_TRACKPAD_I2C_ADDR
+ If (LEqual (\S1EN, 1)) {
+ Return (0xF)
+ } Else {
+ Return (0x0)
}
- })
+ }
Name (_PRW, Package() { BOARD_TRACKPAD_WAKE_GPIO, 0x3 })
Method (_DSW, 3, NotSerialized)
{
Store (BOARD_TRACKPAD_WAKE_GPIO, Local0)
-
If (LEqual (Arg0, 1)) {
// Enable GPIO as wake source
- \_SB.PCI0.LPCB.GWAK (Local0)
+ \_SB.PCI0.LPCB.GPIO.GWAK (Local0)
}
}
+
+ /* Allow device to power off in S0 */
+ Name (_S0W, 4)
}
- Device (TSCR)
+ Device (CTPA)
{
- Name (_ADR, 0x0)
- Name (_UID, 2)
+ Name (_HID, "CYAP0000")
+ Name (_DDN, "Cypress Touchpad")
+ Name (_UID, 3)
+ Name (ISTP, 1) /* Touchpad */
- // Report as a Sleep Button device so Linux will
- // automatically enable it as a wake source
- Name (_HID, EisaId("PNP0C0E"))
+ Name (_CRS, ResourceTemplate()
+ {
+ I2cSerialBus (
+ 0x67, // SlaveAddress
+ ControllerInitiated, // SlaveMode
+ 400000, // ConnectionSpeed
+ AddressingMode7Bit, // AddressingMode
+ "\\_SB.PCI0.I2C0", // ResourceSource
+ )
+ Interrupt (ResourceConsumer, Edge, ActiveLow)
+ {
+ BOARD_TRACKPAD_IRQ
+ }
+ })
+
+ Method (_STA)
+ {
+ If (LEqual (\S1EN, 1)) {
+ Return (0xF)
+ } Else {
+ Return (0x0)
+ }
+ }
+
+ Name (_PRW, Package() { BOARD_TRACKPAD_WAKE_GPIO, 0x3 })
+
+ Method (_DSW, 3, NotSerialized)
+ {
+ Store (BOARD_TRACKPAD_WAKE_GPIO, Local0)
+ If (LEqual (Arg0, 1)) {
+ // Enable GPIO as wake source
+ \_SB.PCI0.LPCB.GPIO.GWAK (Local0)
+ }
+ }
+
+ /* Allow device to power off in S0 */
+ Name (_S0W, 4)
+ }
+
+ Device (CTPB)
+ {
+ Name (_HID, "CYAP0001")
+ Name (_DDN, "Cypress Touchpad")
+ Name (_UID, 3)
+ Name (ISTP, 1) /* Touchpad */
Name (_CRS, ResourceTemplate()
{
+ I2cSerialBus (
+ 0x24, // SlaveAddress
+ ControllerInitiated, // SlaveMode
+ 400000, // ConnectionSpeed
+ AddressingMode7Bit, // AddressingMode
+ "\\_SB.PCI0.I2C0", // ResourceSource
+ )
Interrupt (ResourceConsumer, Edge, ActiveLow)
{
- BOARD_TOUCHSCREEN_IRQ
+ BOARD_TRACKPAD_IRQ
}
+ })
- VendorShort (ADDR)
+ Method (_STA)
{
- BOARD_TOUCHSCREEN_I2C_ADDR
+ If (LEqual (\S1EN, 1)) {
+ Return (0xF)
+ } Else {
+ Return (0x0)
+ }
+ }
+
+ Name (_PRW, Package() { BOARD_TRACKPAD_WAKE_GPIO, 0x3 })
+
+ Method (_DSW, 3, NotSerialized)
+ {
+ Store (BOARD_TRACKPAD_WAKE_GPIO, Local0)
+ If (LEqual (Arg0, 1)) {
+ // Enable GPIO as wake source
+ \_SB.PCI0.LPCB.GPIO.GWAK (Local0)
}
+ }
+
+ /* Allow device to power off in S0 */
+ Name (_S0W, 4)
+ }
+}
+Scope (\_SB.PCI0.I2C1)
+{
+ Device (ATSA)
+ {
+ Name (_HID, "ATML0001")
+ Name (_DDN, "Atmel Touchscreen")
+ Name (_UID, 5)
+ Name (_S0W, 4)
+ Name (ISTP, 0) /* TouchScreen */
+
+ Name (_CRS, ResourceTemplate()
+ {
+ I2cSerialBus (
+ 0x4a, // SlaveAddress
+ ControllerInitiated, // SlaveMode
+ 400000, // ConnectionSpeed
+ AddressingMode7Bit, // AddressingMode
+ "\\_SB.PCI0.I2C1", // ResourceSource
+ )
+
+ // GPIO54 (ball L3) is PIRQW: PIRQL_GSI + PIRQL - PIRQW = PIRQW_GSI
+ // 27 + 3 - 14 = 38
+ Interrupt (ResourceConsumer, Edge, ActiveLow) { 38 }
})
Name (_PRW, Package() { BOARD_TOUCHSCREEN_WAKE_GPIO, 0x3 })
@@ -99,10 +221,80 @@ Scope (\_SB)
Method (_DSW, 3, NotSerialized)
{
Store (BOARD_TOUCHSCREEN_WAKE_GPIO, Local0)
+ If (LEqual (Arg0, 1)) {
+ // Enable GPIO as wake source
+ \_SB.PCI0.LPCB.GPIO.GWAK (Local0)
+ }
+ }
+
+ Method (_STA)
+ {
+ If (LEqual (\S2EN, 1)) {
+ Return (0xF)
+ } Else {
+ Return (0x0)
+ }
+ }
+ }
+ Device (ALSI)
+ {
+ /*
+ * TODO(dlaurie): Need official HID.
+ *
+ * The current HID is created from the Intersil PNP
+ * Vendor ID "LSD" and a shortened device identifier.
+ */
+ Name (_HID, EisaId ("LSD2918"))
+ Name (_DDN, "Intersil 29018 Ambient Light Sensor")
+ Name (_UID, 6)
+
+ Name (_CRS, ResourceTemplate()
+ {
+ I2cSerialBus (
+ 0x44, // SlaveAddress
+ ControllerInitiated, // SlaveMode
+ 400000, // ConnectionSpeed
+ AddressingMode7Bit, // AddressingMode
+ "\\_SB.I2C1", // ResourceSource
+ )
+
+ // On Auron/Peppy board, IRQ is hooked to GPIO 51.
+ // Based on table 5-36, this is PIRQT. Then based on
+ // table 5-12, this is IRQ #35.
+ Interrupt (ResourceConsumer, Edge, ActiveLow)
+ {
+ 35
+ }
+ })
+
+ Method (_STA)
+ {
+ If (LEqual (\S2EN, 1)) {
+ Return (0xF)
+ } Else {
+ Return (0x0)
+ }
+ }
+ }
+}
+
+Scope (\_SB.PCI0.RP01)
+{
+ Device (WLAN)
+ {
+ Name (_ADR, 0x00000000)
+
+ /* GPIO10 is WLAN_WAKE_L_Q */
+ Name (GPIO, 10)
+
+ Name (_PRW, Package() { GPIO, 3 })
+
+ Method (_DSW, 3, NotSerialized)
+ {
If (LEqual (Arg0, 1)) {
// Enable GPIO as wake source
- \_SB.PCI0.LPCB.GWAK (Local0)
+ \_SB.PCI0.LPCB.GPIO.GWAK (^GPIO)
}
}
}
diff --git a/src/mainboard/google/auron/acpi/superio.asl b/src/mainboard/google/auron/acpi/superio.asl
index 0203cad3dc..11ae2d7b6d 100644
--- a/src/mainboard/google/auron/acpi/superio.asl
+++ b/src/mainboard/google/auron/acpi/superio.asl
@@ -1,7 +1,7 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2012 Google Inc.
+ * Copyright (C) 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -18,7 +18,7 @@
*/
/* mainboard configuration */
-#include <mainboard/google/peppy/ec.h>
+#include <mainboard/google/auron/ec.h>
#define SIO_EC_MEMMAP_ENABLE // EC Memory Map Resources
#define SIO_EC_HOST_ENABLE // EC Host Interface Resources
diff --git a/src/mainboard/google/auron/acpi/thermal.asl b/src/mainboard/google/auron/acpi/thermal.asl
index 0533048782..28394978b1 100644
--- a/src/mainboard/google/auron/acpi/thermal.asl
+++ b/src/mainboard/google/auron/acpi/thermal.asl
@@ -1,7 +1,7 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2012 Google Inc.
+ * Copyright (C) 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -17,6 +17,8 @@
* Foundation, Inc.
*/
+#include <mainboard/google/auron/thermal.h>
+
// Thermal Zone
Scope (\_TZ)
@@ -61,7 +63,7 @@ Scope (\_TZ)
Return (\PPKG ())
}
- Method (_TMP, 0, Serialized)
+ Method (TCHK, 0, Serialized)
{
// Get Temperature from TIN# set in NVS
Store (\_SB.PCI0.LPCB.EC0.TINS (TMPS), Local0)
@@ -94,21 +96,46 @@ Scope (\_TZ)
Return (Local0)
}
+ Method (_TMP, 0, Serialized)
+ {
+ // Get temperature from EC in deci-kelvin
+ Store (TCHK (), Local0)
+
+ // Critical temperature in deci-kelvin
+ Store (CTOK (\TCRT), Local1)
+
+ If (LGreaterEqual (Local0, Local1)) {
+ Store ("CRITICAL TEMPERATURE", Debug)
+ Store (Local0, Debug)
+
+ // Wait 1 second for EC to re-poll
+ Sleep (1000)
+
+ // Re-read temperature from EC
+ Store (TCHK (), Local0)
+
+ Store ("RE-READ TEMPERATURE", Debug)
+ Store (Local0, Debug)
+ }
+
+ Return (Local0)
+ }
+
/* CTDP Down */
Method (_AC0) {
If (LLessEqual (\FLVL, 0)) {
- Return (CTOK (\F0OF))
+ Return (CTOK (CTL_TDP_THRESHOLD_OFF))
} Else {
- Return (CTOK (\F0ON))
+ Return (CTOK (CTL_TDP_THRESHOLD_ON))
}
}
/* CTDP Nominal */
Method (_AC1) {
If (LLessEqual (\FLVL, 1)) {
- Return (CTOK (\F1OF))
+ Return (CTOK (CTL_TDP_THRESHILD_NORMAL))
} Else {
- Return (CTOK (\F1ON))
+ Return (CTOK (CTL_TDP_THRESHILD_NORMAL))
}
}
@@ -128,7 +155,7 @@ Scope (\_TZ)
Store (0, \FLVL)
/* Enable Power Limit */
- \_SB.PCI0.MCHC.CTLE (\F0PW)
+ \_SB.PCI0.MCHC.CTLE (CTL_TDP_POWER_LIMIT)
Notify (\_TZ.THRM, 0x81)
}
diff --git a/src/mainboard/google/auron/acpi/video.asl b/src/mainboard/google/auron/acpi/video.asl
new file mode 100644
index 0000000000..3ececa912b
--- /dev/null
+++ b/src/mainboard/google/auron/acpi/video.asl
@@ -0,0 +1,43 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007-2009 coresystems GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+// Brightness write
+Method (BRTW, 1, Serialized)
+{
+ // TODO
+}
+
+// Hot Key Display Switch
+Method (HKDS, 1, Serialized)
+{
+ // TODO
+}
+
+// Lid Switch Display Switch
+Method (LSDS, 1, Serialized)
+{
+ // TODO
+}
+
+// Brightness Notification
+Method(BRTN,1,Serialized)
+{
+ // TODO (no displays defined yet)
+}
+