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authorMarc Jones <marc.jones@se-eng.com>2015-06-09 21:18:38 -0600
committerMarc Jones <marc.jones@se-eng.com>2015-06-13 18:09:20 +0200
commitd862121fbe6285be2f91a0c09058a22a775c0d19 (patch)
tree4ef78f4c720e49a81303f81ccfa957d2fcd64bf1 /src/mainboard/google/auron/spd/spd.h
parentf2dfef01e1fdf9d8218f0bc6ecfc3f943dc4d2a1 (diff)
downloadcoreboot-d862121fbe6285be2f91a0c09058a22a775c0d19.tar.xz
google/auron: Add mainboard
Add the Google Auron Broadwell Reference Mainboard. It is based on the Google Peppy mainboard. It was merged from the following chromium.org commit: d20a1d1a22d64546a5d8761b18ab29732ec0b848 Change-Id: I716a79e198e91c428bd965fcd03665c2c7067602 Signed-off-by: Marc Jones <marc.jones@se-eng.com> Reviewed-on: http://review.coreboot.org/10500 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google/auron/spd/spd.h')
-rw-r--r--src/mainboard/google/auron/spd/spd.h43
1 files changed, 43 insertions, 0 deletions
diff --git a/src/mainboard/google/auron/spd/spd.h b/src/mainboard/google/auron/spd/spd.h
new file mode 100644
index 0000000000..27b1a4e226
--- /dev/null
+++ b/src/mainboard/google/auron/spd/spd.h
@@ -0,0 +1,43 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
+#ifndef MAINBOARD_SPD_H
+#define MAINBOARD_SPD_H
+
+#define SPD_LEN 256
+
+#define SPD_DRAM_TYPE 2
+#define SPD_DRAM_DDR3 0x0b
+#define SPD_DRAM_LPDDR3 0xf1
+#define SPD_DENSITY_BANKS 4
+#define SPD_ADDRESSING 5
+#define SPD_ORGANIZATION 7
+#define SPD_BUS_DEV_WIDTH 8
+#define SPD_PART_OFF 128
+#define SPD_PART_LEN 18
+
+/* Auron board memory configuration GPIOs */
+#define SPD_GPIO_BIT0 13
+#define SPD_GPIO_BIT1 9
+#define SPD_GPIO_BIT2 47
+
+struct pei_data;
+void mainboard_fill_spd_data(struct pei_data *pei_data);
+
+#endif