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| author | Marc Jones <marc.jones@scarletltd.com> | 2018-04-20 16:40:01 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-04-26 22:01:50 +0000 |
| commit | 557b9bbdf2886b055673417c5bbebc3a26fed665 (patch) | |
| tree | 9354abbb356b8159ab1133218df5c489d2f31475 /src/mainboard/google/auron/variant.h | |
| parent | 2d72a170588efdf35583fdcd03024acc80a983f0 (diff) | |
| download | coreboot-557b9bbdf2886b055673417c5bbebc3a26fed665.tar.xz | |
mainboard/google/kahlee: Set SPI speed in bootblock
Set the SPI speed for Normal, Fast, AltIO, and TPM in bootblock.
This setup is needed when moving AGESA out of the bootblock. It sets the
SPI bus speed of the TPM access in verstage.
BUG=b:70558952
TEST=Boot with AGESA moved out of the bootblock.
Change-Id: Ida77d78eb1f290e46b57a46298400ed6c8015e2c
Signed-off-by: Marc Jones <marc.jones@scarletltd.com>
Reviewed-on: https://review.coreboot.org/25756
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/google/auron/variant.h')
0 files changed, 0 insertions, 0 deletions