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author | Matt DeVillier <matt.devillier@gmail.com> | 2016-11-08 15:04:30 -0600 |
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committer | Martin Roth <martinroth@google.com> | 2016-11-24 05:23:36 +0100 |
commit | 81ae67a634d3bd72b10f798490ee25c3a3cb807a (patch) | |
tree | 3e5ef31344bb3f7bf2492bb4331638c7a6490b9c /src/mainboard/google/beltino/smihandler.c | |
parent | b952b0d356ea22b5e8dc6a701493ee3523c200a9 (diff) | |
download | coreboot-81ae67a634d3bd72b10f798490ee25c3a3cb807a.tar.xz |
Add Haswell Chromeboxes/Chromebase using variant board scheme
Combine existing board google/panther with new ChromeOS devices
mccloud, monroe, tricky, and zako, using their common reference board
(beltino) as a base.
Chromium sources used:
firmware-mccloud-5827.B 65bfee7 [haswell: No need pre-graphics delay...]
firmware-monroe-4921.B 1ac749d [Monroe: Disable KB/MS in ITE8772.]
firmware-tricky-5829.B 2db5322 [haswell: No need pre-graphics delay...]
firmware-zako-5219.B eacedef [haswell: No need pre-graphics delay...]
Existing google/panther board will be removed in a subsequent commit.
Variant setup modeled after google/reef
Change-Id: I5d7e0c2551e8b0707841032460c35615cefb2886
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/17329
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/google/beltino/smihandler.c')
-rw-r--r-- | src/mainboard/google/beltino/smihandler.c | 67 |
1 files changed, 67 insertions, 0 deletions
diff --git a/src/mainboard/google/beltino/smihandler.c b/src/mainboard/google/beltino/smihandler.c new file mode 100644 index 0000000000..3d9324d3be --- /dev/null +++ b/src/mainboard/google/beltino/smihandler.c @@ -0,0 +1,67 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2008-2009 coresystems GmbH + * Copyright 2012 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <arch/acpi.h> +#include <arch/io.h> +#include <console/console.h> +#include <cpu/intel/haswell/haswell.h> +#include <cpu/x86/smm.h> +#include <northbridge/intel/haswell/haswell.h> +#include <southbridge/intel/lynxpoint/me.h> +#include <southbridge/intel/lynxpoint/nvs.h> +#include <southbridge/intel/lynxpoint/pch.h> +#include <elog.h> +#include <superio/ite/it8772f/it8772f.h> +#include "onboard.h" + +static int mainboard_finalized = 0; + +int mainboard_smi_apmc(u8 apmc) +{ + switch (apmc) { + case APM_CNT_FINALIZE: + if (mainboard_finalized) { + printk(BIOS_DEBUG, "SMI#: Already finalized\n"); + return 0; + } + + intel_pch_finalize_smm(); + intel_northbridge_haswell_finalize_smm(); + intel_cpu_haswell_finalize_smm(); + + mainboard_finalized = 1; + break; + default: + break; + } + return 0; +} + +void mainboard_smi_sleep(u8 slp_typ) +{ + switch (slp_typ) { + case ACPI_S3: + set_power_led(LED_BLINK); + break; + case ACPI_S4: + case ACPI_S5: + set_power_led(LED_OFF); + break; + default: + break; + } + return; +} |