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authorKevin Chiu <kevin.chiu.17802@gmail.com>2021-01-22 14:33:32 +0800
committerPatrick Georgi <pgeorgi@google.com>2021-01-25 08:51:21 +0000
commit5a27b756423b5913c32ffbfccc9014c60b20e910 (patch)
treee42170d6dec83073b93d69dd6eec34c2303e3da1 /src/mainboard/google/brya
parentcbde6410a039b37d0df07e53953baad552bd22cc (diff)
downloadcoreboot-5a27b756423b5913c32ffbfccc9014c60b20e910.tar.xz
mb/google/zork: update USB 2.0 controller Lane Parameter for dirinboz
From AMD USB phy specialist recommended that for DB port2 (type-A), port3 (type-C C1) the most effective corrections for the depressed eye are: tx_rise_tune=0x0 tx_pre_emp_amp_tune=0x3 tx_fsls_tune = 0x3 BUG=b:165209698 BRANCH=zork TEST=1. emerge-zork coreboot 2. pass USB 2.0 SI eye diagram verification Change-Id: I80afd6bf1257b9a72d0d7651b48d243ebaf5de2f Signed-off-by: Kevin Chiu <kevin.chiu@quantatw.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49824 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Rob Barnes <robbarnes@google.com>
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