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author | Jonathan A. Kollasch <jakllsch@kollasch.net> | 2013-10-11 16:14:18 -0500 |
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committer | Jonathan A. Kollasch <jakllsch@kollasch.net> | 2013-10-14 02:22:07 +0200 |
commit | cf18c856aafaaa2a7e5eaebf64a2d5c647e590e8 (patch) | |
tree | 7e0b40e8a5defcf6eb7bdc9e934b91d57e118f6c /src/mainboard/google/butterfly/chromeos.c | |
parent | 948dede9c5a3d67295c4b9528fd11e741459c116 (diff) | |
download | coreboot-cf18c856aafaaa2a7e5eaebf64a2d5c647e590e8.tar.xz |
ck804: hide IOAPIC base address in PCI_BASE_ADDRESS_1
Linux unhelpfully "fixes" the value in PCI_BASE_ADDRESS_1 when it is
0xfec00000 (that is, outside the range of bus 0 address space). This
causes IOAPIC interrupts to fail to work under Linux. This issue was
originally unnoticed by me when testing as sanity checking such as
this is not done by NetBSD.
Hiding the IOAPIC BAR is done by the OEM BIOS on the ck804 boards I've
checked.
Change-Id: I736db163750f709d68c988fac075597a50b29ab7
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-on: http://review.coreboot.org/3963
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/mainboard/google/butterfly/chromeos.c')
0 files changed, 0 insertions, 0 deletions