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| author | Duncan Laurie <dlaurie@chromium.org> | 2013-04-29 15:04:30 -0700 |
|---|---|---|
| committer | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2013-11-24 07:40:22 +0100 |
| commit | 0edc22490a643c4b4c6181c42eed375485f9e0e4 (patch) | |
| tree | 0293e98cbc3f3f4e8fadd7c89adc7a3eeef1c794 /src/mainboard/google/butterfly | |
| parent | a7e9a9b75f806b290ea4fbe22a03e3489b1931f1 (diff) | |
| download | coreboot-0edc22490a643c4b4c6181c42eed375485f9e0e4.tar.xz | |
smi: Update mainboard_smi_gpi() to have 32bit argument
With the LynxPoint chipset there are more than 16
possible GPIOs that can trigger an SMI so we need
a mainboard handler that can support this.
There are only a handful of users of this function
so just change them all to use the new prototype.
Change-Id: I3d96da0397d6584f713fcf6003054b25c1c92939
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49530
Reviewed-by: Stefan Reinauer <reinauer@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/4145
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/mainboard/google/butterfly')
| -rw-r--r-- | src/mainboard/google/butterfly/mainboard_smi.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/butterfly/mainboard_smi.c b/src/mainboard/google/butterfly/mainboard_smi.c index e2f00e17c9..a40e4288ba 100644 --- a/src/mainboard/google/butterfly/mainboard_smi.c +++ b/src/mainboard/google/butterfly/mainboard_smi.c @@ -52,7 +52,7 @@ int mainboard_io_trap_handler(int smif) return 1; } -void mainboard_smi_gpi(u16 gpi_sts) +void mainboard_smi_gpi(u32 gpi_sts) { printk(BIOS_DEBUG, "warn: unknown mainboard_smi_gpi: %x\n", gpi_sts); } |