diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2016-03-15 16:42:07 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-03-29 23:37:35 +0200 |
| commit | 89cc9ce399845382c2180cd6ee8d2482521aeed1 (patch) | |
| tree | adc2695854b141b66fcfc61937693c747046a194 /src/mainboard/google/chell | |
| parent | 2dfdc7746d0f1b688bb2213e96fcb92e8abaf827 (diff) | |
| download | coreboot-89cc9ce399845382c2180cd6ee8d2482521aeed1.tar.xz | |
google/chell: Update DPTF thermal parameters
MinPL1: 2.5W
MaxPL1: 7W
StepPL1: 0.25W
_PSV(TSR2): 51C
_TRT(TSR2): 9 second
BUG=chrome-os-partner:49859
BRANCH=glados
TEST=build and boot on chell
Change-Id: I69de1d66fb0d52ad0ad77eb51ca56f50fc44c255
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 845f1d046a5143057d683b2bd9cf5dab2ab2ef34
Original-Change-Id: I8a161c979a22621f5f854926677cb7835f8ce88b
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/332857
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-(cherry picked from commit 4d5023524591fc6b651a199874ed990bd5be1d50)
Original-Reviewed-on: https://chromium-review.googlesource.com/333071
Reviewed-on: https://review.coreboot.org/14119
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/google/chell')
| -rw-r--r-- | src/mainboard/google/chell/acpi/dptf.asl | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/google/chell/acpi/dptf.asl b/src/mainboard/google/chell/acpi/dptf.asl index d3549a73df..5af788d845 100644 --- a/src/mainboard/google/chell/acpi/dptf.asl +++ b/src/mainboard/google/chell/acpi/dptf.asl @@ -29,7 +29,7 @@ #define DPTF_TSR2_SENSOR_ID 3 #define DPTF_TSR2_SENSOR_NAME "DRAM" -#define DPTF_TSR2_PASSIVE 55 +#define DPTF_TSR2_PASSIVE 51 #define DPTF_TSR2_CRITICAL 75 #define DPTF_TSR3_SENSOR_ID 4 @@ -63,7 +63,7 @@ Name (DTRT, Package () { Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR1, 100, 600, 0, 0, 0, 0 }, /* CPU Effect on Temp Sensor 2 */ - Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR2, 100, 600, 0, 0, 0, 0 }, + Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR2, 100, 90, 0, 0, 0, 0 }, /* Charger Effect on Temp Sensor 2 */ Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR2, 200, 600, 0, 0, 0, 0 }, @@ -77,11 +77,11 @@ Name (MPPC, Package () 0x2, /* Revision */ Package () { /* Power Limit 1 */ 0, /* PowerLimitIndex, 0 for Power Limit 1 */ - 1600, /* PowerLimitMinimum */ - 6000, /* PowerLimitMaximum */ + 2500, /* PowerLimitMinimum */ + 7000, /* PowerLimitMaximum */ 1000, /* TimeWindowMinimum */ 1000, /* TimeWindowMaximum */ - 200 /* StepSize */ + 250 /* StepSize */ }, Package () { /* Power Limit 2 */ 1, /* PowerLimitIndex, 1 for Power Limit 2 */ |