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authorMatt DeVillier <matt.devillier@gmail.com>2017-08-20 17:56:48 -0500
committerMartin Roth <martinroth@google.com>2017-09-16 22:31:32 +0000
commit4f20a4ae47492fc86293f1c6aed063177992fbaf (patch)
tree0fdb68c963612f0b4cbc901efbf04293719b9ea2 /src/mainboard/google/cyan/spd
parent7427abce07fb80289646b7653242022182b9e8f9 (diff)
downloadcoreboot-4f20a4ae47492fc86293f1c6aed063177992fbaf.tar.xz
google/edgar: add new board as variant of cyan baseboard
Add support for google/edgar (Acer Chromebook 14 CB3-431) as a variant of the cyan Braswell basebaseboard. - Add board-specific code as the new edgar variant - Add common code to the baseboard which will apply to all variants other than cyan Sourced from Chromium branch firmware-edgar-7287.167.B, commit 2319742: Edgar: Add Micron MT52L256M32D1PF-107 SPD data Change-Id: I58548cbbc85828f37c0023e8aa9e09bdca612659 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/21127 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/google/cyan/spd')
-rw-r--r--src/mainboard/google/cyan/spd/hynix_dimm_H9CCNNN8JTBLAR-NUD.spd.hex16
-rw-r--r--src/mainboard/google/cyan/spd/samsung_dimm_K4E8E304EE-EGCE.spd.hex32
-rw-r--r--src/mainboard/google/cyan/spd/samsung_dimm_K4E8E324EB-EGCF.spd.hex32
-rw-r--r--src/mainboard/google/cyan/spd/spd.c6
4 files changed, 85 insertions, 1 deletions
diff --git a/src/mainboard/google/cyan/spd/hynix_dimm_H9CCNNN8JTBLAR-NUD.spd.hex b/src/mainboard/google/cyan/spd/hynix_dimm_H9CCNNN8JTBLAR-NUD.spd.hex
new file mode 100644
index 0000000000..a8e0c26d61
--- /dev/null
+++ b/src/mainboard/google/cyan/spd/hynix_dimm_H9CCNNN8JTBLAR-NUD.spd.hex
@@ -0,0 +1,16 @@
+91 20 F1 03 04 11 05 0B 03 11 01 08 09 00 40 05
+78 78 90 50 90 11 50 E0 10 04 3C 3C 01 90 00 00
+00 00 CA FA 00 00 00 A8 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 80 AD 01 00 00 00 00 00 00 00 00
+48 39 43 43 4E 4E 4E 38 4A 54 42 4C 41 52 2D 4E
+55 44 00 00 80 AD 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
diff --git a/src/mainboard/google/cyan/spd/samsung_dimm_K4E8E304EE-EGCE.spd.hex b/src/mainboard/google/cyan/spd/samsung_dimm_K4E8E304EE-EGCE.spd.hex
new file mode 100644
index 0000000000..056dc258be
--- /dev/null
+++ b/src/mainboard/google/cyan/spd/samsung_dimm_K4E8E304EE-EGCE.spd.hex
@@ -0,0 +1,32 @@
+91 20 F1 03 04 11 05 0B
+03 11 01 08 0A 00 40 01
+78 78 90 50 90 11 50 E0
+10 04 3C 3C 01 90 00 00
+00 00 00 00 00 00 00 A8
+00 88 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 80 CE 01
+00 00 55 00 00 00 00 00
+4B 34 45 38 45 33 30 34
+45 45 2D 45 47 43 45 20
+20 20 00 00 80 CE 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
diff --git a/src/mainboard/google/cyan/spd/samsung_dimm_K4E8E324EB-EGCF.spd.hex b/src/mainboard/google/cyan/spd/samsung_dimm_K4E8E324EB-EGCF.spd.hex
new file mode 100644
index 0000000000..6d9ae526b2
--- /dev/null
+++ b/src/mainboard/google/cyan/spd/samsung_dimm_K4E8E324EB-EGCF.spd.hex
@@ -0,0 +1,32 @@
+91 20 F1 03 05 19 05 03
+03 11 01 08 09 00 40 05
+78 78 90 50 90 11 50 E0
+90 06 3C 3C 01 90 00 00
+00 00 CA FA 00 00 00 A8
+00 88 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 80 CE 01
+00 00 55 00 00 00 00 00
+4B 34 45 38 45 33 32 34
+45 42 2D 45 47 43 46 20
+20 20 00 00 80 CE 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
diff --git a/src/mainboard/google/cyan/spd/spd.c b/src/mainboard/google/cyan/spd/spd.c
index f38fc58ff8..a3db2ed6f4 100644
--- a/src/mainboard/google/cyan/spd/spd.c
+++ b/src/mainboard/google/cyan/spd/spd.c
@@ -137,7 +137,11 @@ static void set_dimm_info(uint8_t *spd, struct dimm_info *dimm)
}
/* Parse the SPD data to determine the DIMM information */
- dimm->ddr_type = MEMORY_DEVICE_DDR3;
+ if (IS_ENABLED(CONFIG_BOARD_GOOGLE_CYAN)) {
+ dimm->ddr_type = MEMORY_DEVICE_DDR3;
+ } else {
+ dimm->ddr_type = MEMORY_DEVICE_LPDDR3;
+ }
dimm->dimm_size = capmb / 8 * busw / devw * ranks; /* MiB */
dimm->mod_type = spd[3] & 0xf;
memcpy((char *)&dimm->module_part_number[0], &spd[0x80],