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author | Matt DeVillier <matt.devillier@gmail.com> | 2017-08-29 00:21:10 -0500 |
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committer | Martin Roth <martinroth@google.com> | 2017-10-13 15:19:55 +0000 |
commit | c8374e32920d2bffbd5fe7b65621fe0b90cfb19e (patch) | |
tree | 02733e664dd05f934800d70fe66a875ae0524b51 /src/mainboard/google/cyan/variants/relm/Makefile.inc | |
parent | 35213664cf8f490df3e6b79199774b84f7648d01 (diff) | |
download | coreboot-c8374e32920d2bffbd5fe7b65621fe0b90cfb19e.tar.xz |
google/relm: add new board as variant of cyan baseboard
Add support for google/relm (white label Chromebook) as
a variant of the cyan Braswell baseboard.
- Add board-specific code as the new relm variant
- Add new shared SPD files to baseboard
Sourced from Chromium branch firmware-strago-7287.B,
commit 02dc8db: Banon: 2nd source DDR memory (Micro-MT52L256M32D1PF)
Change-Id: Ife10f5f75435f356cd896588dd6f425e54f3c88e
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/21574
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Diffstat (limited to 'src/mainboard/google/cyan/variants/relm/Makefile.inc')
-rw-r--r-- | src/mainboard/google/cyan/variants/relm/Makefile.inc | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/src/mainboard/google/cyan/variants/relm/Makefile.inc b/src/mainboard/google/cyan/variants/relm/Makefile.inc new file mode 100644 index 0000000000..c2c1b25155 --- /dev/null +++ b/src/mainboard/google/cyan/variants/relm/Makefile.inc @@ -0,0 +1,45 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2013 Google Inc. +## Copyright (C) 2015 Intel Corp. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## + +romstage-y += romstage.c +romstage-y += spd_util.c + +ramstage-y += gpio.c +ramstage-y += ramstage.c + +SPD_BIN = $(obj)/spd.bin + +SPD_SOURCES = samsung_2GiB_dimm_K4E8E304EE-EGCF +SPD_SOURCES += hynix_2GiB_dimm_H9CCNNN8GTMLAR-NUD +SPD_SOURCES += micron_2GiB_dimm_MT52L256M32D1PF +SPD_SOURCES += samsung_2GiB_dimm_K4E8E324EB-EGCF +SPD_SOURCES += micron_2GiB_dimm_EDF8132A3MA-JD-F +SPD_SOURCES += hynix_dimm_H9CCNNN8JTBLAR-NUD-1G-1866 +SPD_SOURCES += hynix_dimm_H9CCNNN8GTALAR-NUD + +SPD_DEPS := $(foreach f, $(SPD_SOURCES), src/mainboard/$(MAINBOARDDIR)/spd/$(f).spd.hex) + +# Include spd ROM data +$(SPD_BIN): $(SPD_DEPS) + for f in $+; \ + do for c in $$(cat $$f | grep -v ^#); \ + do printf $$(printf '\%o' 0x$$c); \ + done; \ + done > $@ + +cbfs-files-y += spd.bin +spd.bin-file := $(SPD_BIN) +spd.bin-type := spd |