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author | Matt DeVillier <matt.devillier@gmail.com> | 2017-08-24 16:31:41 -0500 |
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committer | Martin Roth <martinroth@google.com> | 2017-09-21 17:31:21 +0000 |
commit | 2f7813f7b3668e67e1ffa7675e53156089a568ef (patch) | |
tree | 2580a77ce734621df3fcb77f38571afad91e95f5 /src/mainboard/google/cyan/variants/terra/spd_util.c | |
parent | cd935e678a8b12cae0827c438a9c86489e6acee3 (diff) | |
download | coreboot-2f7813f7b3668e67e1ffa7675e53156089a568ef.tar.xz |
google/terra: add new board as variant of cyan baseboard
Add support for google/terra (Asus Chromebook C202SA/C300SA) as
a variant of the cyan Braswell baseboard.
- Add board-specific code as the new terra variant
- Add code to the baseboard to handle terra's unique thermal management
- Add new shared SPD files to baseboard
Sourced from Chromium branch firmware-terra-7287.154.B,
commit 153f08a: Revert "Revert "soc/intel/braswell: Populate NVS SCC BAR1""
Change-Id: Ib2682eda15a989f2ec20c78317561f5b6a97483a
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/21570
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/google/cyan/variants/terra/spd_util.c')
-rw-r--r-- | src/mainboard/google/cyan/variants/terra/spd_util.c | 60 |
1 files changed, 60 insertions, 0 deletions
diff --git a/src/mainboard/google/cyan/variants/terra/spd_util.c b/src/mainboard/google/cyan/variants/terra/spd_util.c new file mode 100644 index 0000000000..7b4629d05a --- /dev/null +++ b/src/mainboard/google/cyan/variants/terra/spd_util.c @@ -0,0 +1,60 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2013 Google Inc. + * Copyright (C) 2015 Intel Corp. + * Copyright (C) 2017 Matt DeVillier + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <console/console.h> +#include <mainboard/google/cyan/spd/spd_util.h> + +/* + * RAMID3 -1: Dual channel SKU, 0: Single channel SKU + * 0b0010 - 2GiB total - 1 x 2GiB Micron EDF8132A3MA-GD-F-R 1600MHz + * 0b0011 - 2GiB total - 1 x 2GiB Micron MT52L256M32D1PF-107WT 1866MHz + * 0b0100 - 2GiB total - 1 x 2GiB Samsung K4E8E304EE-EGCE 1600MHz + * 0b0101 - 2GiB total - 1 x 2GiB Samsung K4E8E324EB-EGCF 1866MHz + * + * 0b1010 - 4GiB total - 2 x 2GiB Micron EDF8132A3MA-GD-F-R 1600MHz + * 0b1011 - 4GiB total - 2 x 2GiB Micron MT52L256M32D1PF-107WT 1866MHz + * 0b1100 - 4GiB total - 2 x 2GiB Samsung K4E8E304EE-EGCE 1600MHz + * 0b1101 - 4GiB total - 2 x 2GiB Samsung K4E8E324EB-EGCF 1866MHz + */ + +int get_variant_spd_index(int ram_id, int *dual) +{ + int spd_index = ram_id & 0x03; + + /* Determine if single or dual channel memory system */ + /* RAMID3 is deterministic for terra */ + *dual = ((ram_id > 3) & 0x1) ? 1 : 0; + + /* Display the RAM type */ + printk(BIOS_DEBUG, dual ? "4GiB " : "2GiB "); + switch (spd_index) { + case 0: + printk(BIOS_DEBUG, "Samsung K4E8E304EE-EGCE 1600MHz\n"); + break; + case 1: + printk(BIOS_DEBUG, "Samsung K4E8E324EB-EGCF 1866MHz\n"); + break; + case 2: + printk(BIOS_DEBUG, "Micron EDF8132A3MA-GD-F-R 1600MHz\n"); + break; + case 3: + printk(BIOS_DEBUG, "Micron MT52L256M32D1PF-107WT 1866MHz\n"); + break; + } + + return spd_index; +} |