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author | Matt DeVillier <matt.devillier@gmail.com> | 2017-09-02 21:17:48 -0500 |
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committer | Martin Roth <martinroth@google.com> | 2017-10-15 22:23:18 +0000 |
commit | f4dc596a383c2f6ee03d24f37396a8d8b78f155c (patch) | |
tree | 7d6aae06117ea7bfd67ceb73ccee9d7f2217fea4 /src/mainboard/google/cyan/variants/wizpig/spd_util.c | |
parent | 94bc265b6437d8793d972efa612579b9c2be0ba3 (diff) | |
download | coreboot-f4dc596a383c2f6ee03d24f37396a8d8b78f155c.tar.xz |
google/wizpig: add new board as variant of cyan baseboard
Add support for google/wizpig (white label Chromebook) as
a variant of the cyan Braswell baseboard.
- Add board-specific code as the new wizpig variant
- Add new shared SPD file to the baseboard
Sourced from Chromium branch firmware-strago-7287.B,
commit 02dc8db: Banon: 2nd source DDR memory (Micro-MT52L256M32D1PF)
Change-Id: I424d2256eb79ca3ea0a62620954c57c09ae0c0b2
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/21577
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/google/cyan/variants/wizpig/spd_util.c')
-rw-r--r-- | src/mainboard/google/cyan/variants/wizpig/spd_util.c | 66 |
1 files changed, 66 insertions, 0 deletions
diff --git a/src/mainboard/google/cyan/variants/wizpig/spd_util.c b/src/mainboard/google/cyan/variants/wizpig/spd_util.c new file mode 100644 index 0000000000..80526a1861 --- /dev/null +++ b/src/mainboard/google/cyan/variants/wizpig/spd_util.c @@ -0,0 +1,66 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2013 Google Inc. + * Copyright (C) 2015 Intel Corp. + * Copyright (C) 2017 Matt DeVillier + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <console/console.h> +#include <mainboard/google/cyan/spd/spd_util.h> + +/* We use RAM_ID3 to indicate dual channel config. + * + * 0b0000 - 2GiB total - 1 x 2GiB Samsung K4E8E304EE-EGCE 1600MHz + * 0b0001 - 2GiB total - 1 x 2GiB Hynix H9CCNNN8GTMLAR-NUD 1600MHz + * 0b0010 - 2GiB total - 1 x 2GiB Micron EDF8132A3MA-JD-F 1600MHz + * 0b0011 - 2GiB total - 1 x 2GiB Samsung K4E8E324EB-EGCF 1600MHz + * 0b0100 - 2GiB total - 1 x 2GiB Hynix H9CCNNN8JTBLAR-NUD 1866MHz + * + * 0b1000 - 4GiB total - 2 x 2GiB Samsung K4E8E304EE-EGCE 1600MHz + * 0b1001 - 4GiB total - 2 x 2GiB Hynix H9CCNNN8GTMLAR-NUD 1600MHz + * 0b1010 - 4GiB total - 2 x 2GiB Micron EDF8132A3MA-JD-F 1600MHz + * 0b1011 - 4GiB total - 2 x 2GiB Samsung K4E8E324EB-EGCF 1600MHz + * 0b1100 - 4GiB total - 2 x 2GiB Hynix H9CCNNN8JTBLAR-NUD 1866MHz + * + */ + +int get_variant_spd_index(int ram_id, int *dual) +{ + int spd_index = ram_id & 0x7; + + /* Determine if single or dual channel memory system */ + /* RAMID3 is deterministic for ultima */ + *dual = !!(ram_id & (1<<3)); + + /* Display the RAM type */ + printk(BIOS_DEBUG, *dual ? "4GiB " : "2GiB "); + switch (spd_index) { + case 0: + printk(BIOS_DEBUG, "Samsung K4E8E304EE-EGCE\n"); + break; + case 1: + printk(BIOS_DEBUG, "Hynix H9CCNNN8GTMLAR-NUD\n"); + break; + case 2: + printk(BIOS_DEBUG, "Micron EDF8132A3MA-JD-F\n"); + break; + case 3: + printk(BIOS_DEBUG, "Samsung K4E8E324EB-EGCF\n"); + break; + case 4: + printk(BIOS_DEBUG, "Hynix H9CCNNN8JTBLAR-NUD\n"); + break; + } + + return spd_index; +} |