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author | Furquan Shaikh <furquan@google.com> | 2020-05-22 00:06:33 -0700 |
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committer | Furquan Shaikh <furquan@google.com> | 2020-05-29 15:58:11 +0000 |
commit | 1a438f33ffe5482c7a995cb1b25cc70db9b1e7fa (patch) | |
tree | b5b692f6ac33ff395eabbee7a4ed40d2ebd6a44e /src/mainboard/google/cyan | |
parent | 8a017aa394f40e6712f006eda2cdfe647c7a1172 (diff) | |
download | coreboot-1a438f33ffe5482c7a995cb1b25cc70db9b1e7fa.tar.xz |
mb/google/hatch: Select BOARD_ROMSIZE_KB_16384 by default
All hatch and puff variants use 16MiB SPI flash except the legacy ones
which used 32MiB flash. Kconfig.name is updated to select
BOARD_ROMSIZE_KB_32768 only for the legacy variants and
BOARD_GOOGLE_HATCH_COMMON selects BOARD_ROMSIZE_KB_16384 by default if
BOARD_ROMSIZE_KB_32768 is not selected.
TEST=Verified using abuild --timeless that all hatch variants generate
the same coreboot.rom image with and without this change.
Change-Id: I708506182966936ea38562db8b0325470e34c908
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41662
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: V Sowmya <v.sowmya@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/cyan')
0 files changed, 0 insertions, 0 deletions