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| author | Wisley Chen <wisley.chen@quantatw.com> | 2020-07-17 20:34:36 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-07-26 21:07:01 +0000 |
| commit | 10be338b52481890e9b401fa46392542b689d79b (patch) | |
| tree | 51ef5ce6b2d6b687d8bf24e53912505a5970cd3c /src/mainboard/google/dedede/variants | |
| parent | be4376c6c6b43e9d848737423916fbf85fa1c746 (diff) | |
| download | coreboot-10be338b52481890e9b401fa46392542b689d79b.tar.xz | |
mb/google/dedede/var/drawcia: Add G2Touch touchscreen support
BUG=b:155002684
TEST=build drawcia, and check touchscreen can work
Change-Id: I29a891e07bb3c1d8ebe17666c18bfcf3bc1c361d
Signed-off-by: Wisley Chen <wisley.chen@quantatw.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43551
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Diffstat (limited to 'src/mainboard/google/dedede/variants')
| -rw-r--r-- | src/mainboard/google/dedede/variants/drawcia/overridetree.cb | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/variants/drawcia/overridetree.cb b/src/mainboard/google/dedede/variants/drawcia/overridetree.cb index bc10e1ff2b..78fec88d82 100644 --- a/src/mainboard/google/dedede/variants/drawcia/overridetree.cb +++ b/src/mainboard/google/dedede/variants/drawcia/overridetree.cb @@ -74,6 +74,20 @@ chip soc/intel/jasperlake register "has_power_resource" = "1" device i2c 10 on end end + chip drivers/i2c/hid + register "generic.hid" = ""GTCH7503"" + register "generic.desc" = ""G2TOUCH Touchscreen"" + register "generic.irq" = "ACPI_IRQ_EDGE_LOW(GPP_D4_IRQ)" + register "generic.probed" = "1" + register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D5)" + register "generic.reset_delay_ms" = "50" + register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D6)" + register "generic.enable_delay_ms" = "1" + register "generic.has_power_resource" = "1" + register "generic.disable_gpio_export_in_crs" = "1" + register "hid_desc_reg_offset" = "0x01" + device i2c 40 on end + end end # I2C 2 device pci 19.0 on chip drivers/i2c/generic |