diff options
author | Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> | 2021-04-28 16:12:02 +0800 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2021-05-04 21:28:19 +0000 |
commit | b984695341d5ea5acd3c6b17a80d14b53c24da43 (patch) | |
tree | 20ebed92046820e744ec8234d06c74896f8e783e /src/mainboard/google/dedede | |
parent | 446b1888e3b5bc195b5554ec5794f574d7dcc94c (diff) | |
download | coreboot-b984695341d5ea5acd3c6b17a80d14b53c24da43.tar.xz |
mb/google/dedede/var/cret: Modify reset setting for touchscreen
Modify reset pin setting to ACPI_GPIO_OUTPUT_ACTIVE_LOW for
ELAN and Weida touchscreen.
BUG=b:180547621
BRANCH=dedede
TEST=Build the cret board and touchscreen is workable.
Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Change-Id: I912fe8a0e18a4c3527fb8587592b855c93b12406
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52727
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/mainboard/google/dedede')
-rw-r--r-- | src/mainboard/google/dedede/variants/cret/overridetree.cb | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/dedede/variants/cret/overridetree.cb b/src/mainboard/google/dedede/variants/cret/overridetree.cb index 0cf3bdf187..512a956f59 100644 --- a/src/mainboard/google/dedede/variants/cret/overridetree.cb +++ b/src/mainboard/google/dedede/variants/cret/overridetree.cb @@ -114,7 +114,7 @@ chip soc/intel/jasperlake register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_D4_IRQ)" register "generic.probed" = "1" register "generic.reset_gpio" = - "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D5)" + "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D5)" register "generic.reset_delay_ms" = "20" register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A11)" @@ -132,7 +132,7 @@ chip soc/intel/jasperlake register "desc" = ""ELAN Touchscreen"" register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_D4_IRQ)" register "probed" = "1" - register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D5)" + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D5)" register "reset_delay_ms" = "20" register "reset_off_delay_ms" = "2" register "stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A11)" |