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authorAamir Bohra <aamir.bohra@intel.com>2020-02-26 01:30:03 +0530
committerSubrata Banik <subrata.banik@intel.com>2020-02-26 05:46:33 +0000
commit741dec4681482bb64646fbbcc47afd8dd48ed611 (patch)
treee55a4a1bc63121401ad7f6b6a7027d4f8ba9a873 /src/mainboard/google/dedede
parent71090c6063fd73b7390149b7234d4070cc904855 (diff)
downloadcoreboot-741dec4681482bb64646fbbcc47afd8dd48ed611.tar.xz
mb/google/dedede: Enable host bridge device
Change-Id: Ie47265527b2b81748f4f3ad744d35cb81af17b80 Signed-off-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39122 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: V Sowmya <v.sowmya@intel.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/mainboard/google/dedede')
-rw-r--r--src/mainboard/google/dedede/variants/baseboard/devicetree.cb2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
index c17620b3e7..346a3096b6 100644
--- a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
@@ -109,7 +109,7 @@ chip soc/intel/tigerlake
}"
device domain 0 on
- device pci 00.0 off end # Host Bridge
+ device pci 00.0 on end # Host Bridge
device pci 02.0 off end # Integrated Graphics Device
device pci 04.0 off end # SA Thermal device
device pci 05.0 off end # IPU