diff options
author | Thejaswani Putta <thejaswani.putta@intel.com> | 2019-08-15 13:31:36 -0700 |
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committer | Martin Roth <martinroth@google.com> | 2019-08-23 06:34:07 +0000 |
commit | 51d9d6712e6e576b105cd4feb83e2fcbfa8e83b1 (patch) | |
tree | 33bd4c89bdf130f2ca85175c6d29b0721196bb3b /src/mainboard/google/drallion/variants/arcada_cml/include/variant/acpi/mainboard.asl | |
parent | 652799b7385168d1d61bf188a777234fc3d63dbd (diff) | |
download | coreboot-51d9d6712e6e576b105cd4feb83e2fcbfa8e83b1.tar.xz |
mb/google/drallion: Add two variants - arcada_cml & sarien_cml
These variants are to support the sarien and arcada boards
with CML SOC, the drallion variant will be used to support the
upcoming drallion board.
Signed-off-by: Thejaswani Putta <thejaswani.putta@intel.com>
Change-Id: I766bdccb6f8b6924d6ae1abbe57035f4ff1f6f17
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34887
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mathew King <mathewk@chromium.org>
Diffstat (limited to 'src/mainboard/google/drallion/variants/arcada_cml/include/variant/acpi/mainboard.asl')
-rw-r--r-- | src/mainboard/google/drallion/variants/arcada_cml/include/variant/acpi/mainboard.asl | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/src/mainboard/google/drallion/variants/arcada_cml/include/variant/acpi/mainboard.asl b/src/mainboard/google/drallion/variants/arcada_cml/include/variant/acpi/mainboard.asl new file mode 100644 index 0000000000..41121d28fe --- /dev/null +++ b/src/mainboard/google/drallion/variants/arcada_cml/include/variant/acpi/mainboard.asl @@ -0,0 +1,44 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2019 Intel Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#define CAM_EN GPP_B11 /* Active low */ +#define TS_PD GPP_E7 + +/* Method called from LPIT prior to enter s0ix state */ +Method (MS0X, 1) +{ + If (Arg0) { + /* Turn off camera power */ + \_SB.PCI0.STXS (CAM_EN) + } Else { + /* Turn on camera power */ + \_SB.PCI0.CTXS (CAM_EN) + } +} + +/* Method called from _PTS prior to enter sleep state */ +Method (MPTS, 1) +{ + \_SB.PCI0.LPCB.EC0.PTS (Arg0) + + /* Clear touch screen pd pin to avoid leakage */ + \_SB.PCI0.CTXS (TS_PD) +} + +/* Method called from _WAK prior to wakeup */ +Method (MWAK, 1) +{ + \_SB.PCI0.LPCB.EC0.WAK (Arg0) +} |