summaryrefslogtreecommitdiff
path: root/src/mainboard/google/drallion
diff options
context:
space:
mode:
authorEric Lai <ericr_lai@compal.corp-partner.google.com>2019-09-04 13:49:07 +0800
committerPatrick Georgi <pgeorgi@google.com>2019-10-02 11:19:23 +0000
commit0f47ff1be5a16c8de1995617830ec8fedbbb4197 (patch)
tree7e951cab35fdee1b4c2ce0bdb0a7b6a7002ed537 /src/mainboard/google/drallion
parentcf9588040d91148c2c83b5f6200687448f4f2193 (diff)
downloadcoreboot-0f47ff1be5a16c8de1995617830ec8fedbbb4197.tar.xz
mb/google/drallion: Dynamicly disable memory channel
Disable memory channel by HW strap pin. Using for factory debug. BUG=b:139773082 BRANCH=N/A TEST=Rework HW strap pin and check /proc/mem_info Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com> Change-Id: Ic5f53f0ba3bd432fbcb7513d2a8aa49d42f7a23e Reviewed-on: https://review.coreboot.org/c/coreboot/+/35241 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/drallion')
-rw-r--r--src/mainboard/google/drallion/variants/drallion/gpio.c7
-rw-r--r--src/mainboard/google/drallion/variants/drallion/include/variant/gpio.h4
2 files changed, 11 insertions, 0 deletions
diff --git a/src/mainboard/google/drallion/variants/drallion/gpio.c b/src/mainboard/google/drallion/variants/drallion/gpio.c
index 154fc5a7f2..f0fc55e8d4 100644
--- a/src/mainboard/google/drallion/variants/drallion/gpio.c
+++ b/src/mainboard/google/drallion/variants/drallion/gpio.c
@@ -286,4 +286,11 @@ void variant_mainboard_post_init_params(FSPM_UPD *mupd)
FSP_M_CONFIG *fsp_m_cfg = &mupd->FspmConfig;
if (fsp_m_cfg->PchIshEnable)
fsp_m_cfg->PchIshEnable = is_ish_device_enabled();
+
+ /*
+ * Disable memory channel by HW strap pin, HW default is enable
+ * 0: Enable both DIMMs, 3: Disable both DIMMs
+ */
+ mupd->FspmConfig.DisableDimmChannel0 = gpio_get(DDR_CH0_EN) ? 0 : 3;
+ mupd->FspmConfig.DisableDimmChannel1 = gpio_get(DDR_CH1_EN) ? 0 : 3;
}
diff --git a/src/mainboard/google/drallion/variants/drallion/include/variant/gpio.h b/src/mainboard/google/drallion/variants/drallion/include/variant/gpio.h
index 251b40e0d0..219e0c4b37 100644
--- a/src/mainboard/google/drallion/variants/drallion/include/variant/gpio.h
+++ b/src/mainboard/google/drallion/variants/drallion/include/variant/gpio.h
@@ -28,6 +28,10 @@
/* Sensor detection pin */
#define SENSOR_DET_360 GPP_H5
+/* DDR channel enable pin */
+#define DDR_CH0_EN GPP_F1
+#define DDR_CH1_EN GPP_F2
+
/* Memory configuration board straps */
#define GPIO_MEM_CONFIG_0 GPP_F12
#define GPIO_MEM_CONFIG_1 GPP_F13