diff options
| author | Furquan Shaikh <furquan@chromium.org> | 2017-02-11 12:02:40 -0800 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2017-02-16 08:42:38 +0100 |
| commit | 231c198e2ce56741c945149a6c553b1f4e81a4e2 (patch) | |
| tree | 8f1b35fa5c50e549c0f71fbdae1331b0d05268cb /src/mainboard/google/eve/acpi | |
| parent | 20a91c9830eaa74ee58cfccb59193671949eb086 (diff) | |
| download | coreboot-231c198e2ce56741c945149a6c553b1f4e81a4e2.tar.xz | |
mainboard/google/eve: Generate FPC device using SPI SSDT generator
Use the newly added SPI SSDT generator for adding FPC device.
BUG=chrome-os-partner:59832
BRANCH=None
TEST=Compiles successfully. Verified that the SSDT entry matches the
entry in mainboard.asl
Change-Id: I1b3c33f2b4337735a9725dd4eb6193b2455962d7
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/18343
Tested-by: build bot (Jenkins)
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/mainboard/google/eve/acpi')
| -rw-r--r-- | src/mainboard/google/eve/acpi/mainboard.asl | 49 |
1 files changed, 0 insertions, 49 deletions
diff --git a/src/mainboard/google/eve/acpi/mainboard.asl b/src/mainboard/google/eve/acpi/mainboard.asl deleted file mode 100644 index a55308ff31..0000000000 --- a/src/mainboard/google/eve/acpi/mainboard.asl +++ /dev/null @@ -1,49 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2016 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -Scope (\_SB.PCI0.SPI1) -{ - Device (FPC) - { - Name (_HID, "PRP0001") - Name (_UID, 1) - Name (_CRS, ResourceTemplate () - { - SpiSerialBus ( - 0, // DeviceSelection (CS0) - PolarityLow, // DeviceSelectionPolarity - FourWireMode, // WireMode - 8, // DataBitLength - ControllerInitiated, // SlaveMode - 1000000, // ConnectionSpeed (1MHz) - ClockPolarityLow, // ClockPolarity - ClockPhaseFirst, // ClockPhase - "\\_SB.PCI0.SPI1", // ResourceSource - 0, // ResourceSourceIndex - ResourceConsumer, // ResourceUsage - ) - Interrupt (ResourceConsumer, Edge, ActiveLow) { 0x50 } - }) - Name (_DSD, Package () { - ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), - Package () { - Package () { - "compatible", - Package () { "fpc,fpc1020" } - }, - } - }) - } -} |