diff options
author | Duncan Laurie <dlaurie@chromium.org> | 2016-10-28 09:13:52 -0700 |
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committer | Duncan Laurie <dlaurie@chromium.org> | 2016-11-01 22:54:25 +0100 |
commit | 81485d2763f461ce28dad2ffc43441c4bae570dd (patch) | |
tree | a41429a0cf17fef0dc7520f69265708ed47ba932 /src/mainboard/google/eve/spd/spd.h | |
parent | ec7293652af797b2595bec396bae8cd625afbf8e (diff) | |
download | coreboot-81485d2763f461ce28dad2ffc43441c4bae570dd.tar.xz |
google/eve: Add new board
Add the eve board files using kabylake and FSP 2.0.
BUG=chrome-os-partner:58666
TEST=build and boot on eve board
Change-Id: I7ca71fe052608d710ee65d078df7af7b55d382bc
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/17177
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/google/eve/spd/spd.h')
-rw-r--r-- | src/mainboard/google/eve/spd/spd.h | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/src/mainboard/google/eve/spd/spd.h b/src/mainboard/google/eve/spd/spd.h new file mode 100644 index 0000000000..9c2b26bb12 --- /dev/null +++ b/src/mainboard/google/eve/spd/spd.h @@ -0,0 +1,35 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2016 Google Inc. + * Copyright (C) 2016 Intel Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef MAINBOARD_SPD_H +#define MAINBOARD_SPD_H + +#define SPD_LEN 256 + +#define SPD_DRAM_TYPE 2 +#define SPD_DRAM_DDR3 0x0b +#define SPD_DRAM_LPDDR3 0xf1 +#define SPD_DENSITY_BANKS 4 +#define SPD_ADDRESSING 5 +#define SPD_ORGANIZATION 7 +#define SPD_BUS_DEV_WIDTH 8 +#define SPD_PART_OFF 128 +#define SPD_PART_LEN 18 +#define SPD_MANU_OFF 148 + +uintptr_t mainboard_get_spd_data(void); + +#endif |