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author | Maxim Polyakov <max.senia.poliak@gmail.com> | 2020-06-28 10:53:15 +0300 |
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committer | Michael Niewöhner <c0d3z3r0@review.coreboot.org> | 2020-07-24 23:39:33 +0000 |
commit | 68c7eff5fe958eeceb203e95405b57555e2d3567 (patch) | |
tree | 1673c59e79bb370bb2cd0ad8f07e29de4eda0ad0 /src/mainboard/google/eve | |
parent | 97f69a1a9472c28f2a8243bd6c9f04092fad02a9 (diff) | |
download | coreboot-68c7eff5fe958eeceb203e95405b57555e2d3567.tar.xz |
supermicro/x11-lga1151/gpio: 2/4 Exclude fields for PAD_CFG
This patch excludes bit fields that should be ignored [1] in order
to convert current macros to target PAD_CFG_*() macros. The following
commands were used for this:
./intelp2m -ii -fld cb -ign -t 1 -p snr -file ../../src/mainboard/
supermicro/x11-lga1151-series/variants/x11ssm-f/include/variant/gpio.h
/intelp2m -ii -fld cb -ign -t 1 -p snr -file ../../src/mainboard/
supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h
[1] ignore RX Level/Edge Configuration (bit 26:25) and RX/TX Buffer
Disable (bit 9:8) for the native function, because it does not
affect the pad in this mode.
This is part of the patch set
"mb/supermicro/x11-lga1151: Rewrite pad config using intelp2m":
CB:42916 - 1/4 Decode raw register values
CB:42917 - 2/4 Exclude fields for PAD_CFG
CB:42918 - 3/4 Fixes some field macro
CB:35679 - 4/4 Convert field macros to PAD_CFG
Change-Id: Icdf366a8d416598cec5afcb9a0fae6bf7ecd7ba0
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42917
Reviewed-by: Michael Niewöhner
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/eve')
0 files changed, 0 insertions, 0 deletions