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| author | Mario Scheithauer <mario.scheithauer@siemens.com> | 2019-01-11 14:25:38 +0100 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2019-01-11 18:54:56 +0000 |
| commit | dd217362d44f197b08fa69f3c2c14e743e1bc90b (patch) | |
| tree | 4623ec268d58a8639a8346e11add06e67b4b68fa /src/mainboard/google/fizz | |
| parent | 5ce73e9836761cb9c674fca07fe45fcfb7e20b64 (diff) | |
| download | coreboot-dd217362d44f197b08fa69f3c2c14e743e1bc90b.tar.xz | |
siemens/mc_apl1: Use INTEL_LPSS_UART_FOR_CONSOLE
With the commit a96e66a (soc/intel: Clean mess around UART_DEBUG), an
adjustment is necessary for this mainboard.
Change-Id: I0fb6288959f8bcb45c4cc93cc132f31a5ab2a5ad
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/30836
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/google/fizz')
0 files changed, 0 insertions, 0 deletions