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| author | Kane Chen <kane.chen@intel.com> | 2017-11-01 12:45:51 +0800 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-11-01 16:27:24 +0000 |
| commit | a26c94e85493a92dc1238a1c7bbd1f9c1d0f3352 (patch) | |
| tree | 226f27ee5e58f330930820c38edfd5d9c4db4022 /src/mainboard/google/fizz | |
| parent | 19ba2e02108f8cdae6000b162714b788d599cbcb (diff) | |
| download | coreboot-a26c94e85493a92dc1238a1c7bbd1f9c1d0f3352.tar.xz | |
google/fizz: enable SPD read by word
This is to enable SPD word access to reduce boot time. It can save
80 ~ 100 ms per DIMM.
BUG=b:67021853
BRANCH=None
TEST=system boot, and boot time is reduced
Change-Id: Ic527a539ed634e15b939b18fff4b4e08ebb3ec57
Signed-off-by: Kane Chen <kane.chen@intel.com>
Reviewed-on: https://review.coreboot.org/22267
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/google/fizz')
| -rw-r--r-- | src/mainboard/google/fizz/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/fizz/Kconfig b/src/mainboard/google/fizz/Kconfig index 34e3881b21..8036b8b644 100644 --- a/src/mainboard/google/fizz/Kconfig +++ b/src/mainboard/google/fizz/Kconfig @@ -18,6 +18,7 @@ config BOARD_SPECIFIC_OPTIONS select FIZZ_USE_SPI_TPM select GENERIC_SPD_BIN select RT8168_GET_MAC_FROM_VPD + select SPD_READ_BY_WORD config VBOOT select EC_GOOGLE_CHROMEEC_SWITCHES |