diff options
| author | Joel Kitching <kitching@google.com> | 2019-04-07 00:37:14 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-04-11 11:23:26 +0000 |
| commit | ae0fb762a2b0592a9734120bd14e0b7a98af9d31 (patch) | |
| tree | 48bff02725b52be3e38e4adb7584ab204c0d7020 /src/mainboard/google/gale/chromeos.c | |
| parent | 482eec0e1bb43aee59cdbb4ec39068fecbcc012b (diff) | |
| download | coreboot-ae0fb762a2b0592a9734120bd14e0b7a98af9d31.tar.xz | |
chromeos: clean up "recovery" and "write protect" GPIOs
The "write protect" GPIO's cached value is never actually
read after entering depthcharge. Ensure the value from
get_write_protect_state() is being transferred accurately,
so that we may read this GPIO value in depthcharge without
resampling.
The cached value of the "recovery" GPIO is read only on certain
boards which have a physical recovery switch. Correct some of
the values sent to boards which presumably never read the
previously incorrect value. Most of these inaccuracies are from
non-inverted values on ACTIVE_LOW GPIOs.
BUG=b:124141368, b:124192753, chromium:950273
TEST=make clean && make test-abuild
BRANCH=none
Change-Id: Ic17a98768703d7098480a9233b752fe5b201bd51
Signed-off-by: Joel Kitching <kitching@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32233
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/mainboard/google/gale/chromeos.c')
| -rw-r--r-- | src/mainboard/google/gale/chromeos.c | 19 |
1 files changed, 8 insertions, 11 deletions
diff --git a/src/mainboard/google/gale/chromeos.c b/src/mainboard/google/gale/chromeos.c index 66b1a62ea4..69c3a7a3c7 100644 --- a/src/mainboard/google/gale/chromeos.c +++ b/src/mainboard/google/gale/chromeos.c @@ -25,9 +25,6 @@ #include <vendorcode/google/chromeos/chromeos.h> #define PP_SW 41 -#define PP_POL ACTIVE_LOW -#define REC_POL ACTIVE_LOW -#define WP_POL ACTIVE_LOW static int get_rec_sw_gpio_pin(void) { @@ -70,11 +67,11 @@ static int read_gpio(gpio_t gpio_num) void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { - {PP_SW, PP_POL, read_gpio(PP_SW), "presence"}, - {get_rec_sw_gpio_pin(), REC_POL, + {PP_SW, ACTIVE_LOW, read_gpio(PP_SW), "presence"}, + {get_rec_sw_gpio_pin(), ACTIVE_LOW, read_gpio(get_rec_sw_gpio_pin()), "recovery"}, - {get_wp_status_gpio_pin(), WP_POL, - read_gpio(get_wp_status_gpio_pin()), "write protect"}, + {get_wp_status_gpio_pin(), ACTIVE_LOW, + !get_write_protect_state(), "write protect"}, {-1, ACTIVE_LOW, 1, "power"}, {-1, ACTIVE_LOW, 0, "lid"}, }; @@ -119,7 +116,7 @@ static enum switch_state get_switch_state(void) return saved_state; rec_sw = get_rec_sw_gpio_pin(); - sampled_value = read_gpio(rec_sw) ^ !REC_POL; + sampled_value = !read_gpio(rec_sw); if (!sampled_value) { saved_state = no_req; @@ -133,7 +130,7 @@ static enum switch_state get_switch_state(void) stopwatch_init_msecs_expire(&sw, WIPEOUT_MODE_DELAY_MS); do { - sampled_value = read_gpio(rec_sw) ^ !REC_POL; + sampled_value = !read_gpio(rec_sw); if (!sampled_value) break; } while (!stopwatch_expired(&sw)); @@ -143,7 +140,7 @@ static enum switch_state get_switch_state(void) printk(BIOS_INFO, "wipeout requested, checking recovery\n"); stopwatch_init_msecs_expire(&sw, RECOVERY_MODE_EXTRA_DELAY_MS); do { - sampled_value = read_gpio(rec_sw) ^ !REC_POL; + sampled_value = !read_gpio(rec_sw); if (!sampled_value) break; } while (!stopwatch_expired(&sw)); @@ -175,5 +172,5 @@ int get_wipeout_mode_switch(void) int get_write_protect_state(void) { - return read_gpio(get_wp_status_gpio_pin()) ^ !WP_POL; + return !read_gpio(get_wp_status_gpio_pin()); } |