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author | Patrick Georgi <pgeorgi@chromium.org> | 2015-07-20 22:01:32 +0200 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2015-07-21 20:16:12 +0200 |
commit | 406313d46d00c74dcfc80d4721bbd774d8b83911 (patch) | |
tree | 6c80eca37c7ee040a83c931bb20ffe0ad5bc89fd /src/mainboard/google/glados/dsdt.asl | |
parent | 43bf00e594345412bd00d3e01001c4daf3c3b537 (diff) | |
download | coreboot-406313d46d00c74dcfc80d4721bbd774d8b83911.tar.xz |
google/glados: add new board
Change-Id: I0c196ff84484717c59c59d11bb7230b5920e0654
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10997
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google/glados/dsdt.asl')
-rw-r--r-- | src/mainboard/google/glados/dsdt.asl | 57 |
1 files changed, 57 insertions, 0 deletions
diff --git a/src/mainboard/google/glados/dsdt.asl b/src/mainboard/google/glados/dsdt.asl new file mode 100644 index 0000000000..6ac0be425a --- /dev/null +++ b/src/mainboard/google/glados/dsdt.asl @@ -0,0 +1,57 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2009 coresystems GmbH + * Copyright (C) 2015 Google Inc. + * Copyright (C) 2015 Intel Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ + +DefinitionBlock( + "dsdt.aml", + "DSDT", + 0x05, // DSDT revision: ACPI v5.0 + "COREv4", // OEM id + "COREBOOT", // OEM table id + 0x20110725 // OEM revision +) +{ + // Some generic macros + #include <soc/intel/skylake/acpi/platform.asl> + + // global NVS and variables + #include <soc/intel/skylake/acpi/globalnvs.asl> + + // CPU + #include <soc/intel/skylake/acpi/cpu.asl> + + Scope (\_SB) { + Device (PCI0) + { + #include <soc/intel/skylake/acpi/systemagent.asl> + #include <soc/intel/skylake/acpi/pch.asl> + } + } + + // Chrome OS specific + #include "acpi/chromeos.asl" + #include <vendorcode/google/chromeos/acpi/chromeos.asl> + + // Chipset specific sleep states + #include <soc/intel/skylake/acpi/sleepstates.asl> + + // Mainboard specific + #include "acpi/mainboard.asl" +} |