summaryrefslogtreecommitdiff
path: root/src/mainboard/google/glados
diff options
context:
space:
mode:
authorVadim Bendebury <vbendeb@chromium.org>2016-05-12 16:40:37 +0800
committerMartin Roth <martinroth@google.com>2016-05-18 20:21:03 +0200
commita9cd4a2f117f03abb4e4433b040c2225242fd35f (patch)
treecc0ad3075b4f63a988bc99d15b2be8b74e110015 /src/mainboard/google/glados
parent2832c4125bb74cf09414df23f54e0b87ab8bce7b (diff)
downloadcoreboot-a9cd4a2f117f03abb4e4433b040c2225242fd35f.tar.xz
rk3399: add GPIO register definitions for SDMMC0
The code needs to be able to set drive strength for the pins used for SDMMC0 interface. This patch adds the definitions for the two registers, as per page 378 of the RK3399 TRM Part 1. Instead of calculation of the reserved range size just use known offsets of the registers included in the structure. BRANCH=none BUG=chrome-os-partner:53257 TEST=with the upcoming driver change it is possible to boot chrome OS on Gru from various micro SD cards which were failing before. Change-Id: I63bf37432ec7f3bdf7e9c6a79d51c31de122dae9 Signed-off-by: Martin Roth <martinroth@google.com> Original-Commit-Id: c6d6dc5e5e6cc81c173603d4eb21ae803a47815d Original-Change-Id: Ibe7584e77b446435ab1264dcf8fc8bfe0c50438e Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/344490 Original-Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/14852 Tested-by: build bot (Jenkins) Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Diffstat (limited to 'src/mainboard/google/glados')
0 files changed, 0 insertions, 0 deletions